// SPDX-License-Identifier: BSD-3-Clause
/*
 * Copyright (c) 2024-2025, Qualcomm Innovation Center, Inc. All rights reserved.
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/clock/qcom,gcc-sun.h>

&qupv3_se4_i2c {
	#address-cells = <1>;
	#size-cells = <0>;

	status = "ok";
	qcom,touch-active = "st,fts";

	st_fts@49 {
		compatible = "st,fts";
		reg = <0x49>;
		interrupt-parent = <&tlmm>;
		interrupts = <176 0x2008>;
		vdd-supply = <&L1D>;
		avdd-supply = <&L22B>;
		pinctrl-names = "pmx_ts_active", "pmx_ts_suspend";
		pinctrl-0 = <&ts_active>;
		pinctrl-1 = <&ts_int_suspend &ts_reset_suspend>;
		st,irq-gpio = <&tlmm 176 0x2008>;
		st,irq-flags = <8>;
		st,reset-gpio = <&tlmm 189 0x00>;
		st,regulator_dvdd = "vdd";
		st,regulator_avdd = "avdd";

		st,touch-type = "primary";
		st,qts_en;
		qts,trusted-touch-mode = "vm_mode";
		qts,touch-environment = "pvm";
		qts,trusted-touch-type = "primary";
		qts,trusted-touch-spi-irq = <658>;
		qts,trusted-touch-io-bases = <0xa90000>;
		qts,trusted-touch-io-sizes = <0x1000>;
		qts,trusted-touch-vm-gpio-list = <&tlmm 16 0 &tlmm 17 0 &tlmm 18 0
						&tlmm 19 0 &tlmm 189 0 &tlmm 176 0x2008>;
	};
};

&ufsphy_mem {
	compatible = "qcom,ufs-phy-qmp-v4-niobe";

	/* VDDA_UFS_CORE */
	vdda-phy-supply = <&L1F>;
	vdda-phy-max-microamp = <213100>;
	/*
	 * Platforms supporting Gear 5 && Rate B require a different
	 * voltage supply. Check the Power Grid document.
	 */
	vdda-phy-min-microvolt = <912000>;

	/* VDDA_UFS_0_1P2 */
	vdda-pll-supply = <&L4B>;
	vdda-pll-max-microamp = <18340>;

	/* Phy GDSC for VDD_MX, always on */
	vdd-phy-gdsc-supply = <&gcc_ufs_mem_phy_gdsc>;

	/* Qref power supply, Refer Qref diagram */
	vdda-qref-supply = <&L2B>;
	vdda-qref-max-microamp = <64500>;

	status = "ok";
};

&ufshc_mem {
	vdd-hba-supply = <&gcc_ufs_phy_gdsc>;

	vcc-supply = <&L12B>;
	vcc-max-microamp = <1200000>;

	vccq-supply = <&L3F>;
	vccq-max-microamp = <1200000>;

	qcom,vccq-proxy-vote-supply = <&L3F>;
	qcom,vccq-proxy-vote-max-microamp = <1200000>;

	/* VDD_PX10 is voted for the ufs_reset_n */
	qcom,vddp-ref-clk-supply = <&L5B>;
	qcom,vddp-ref-clk-max-microamp = <100>;

	qcom,vccq-parent-supply = <&S2B>;
	qcom,vccq-parent-max-microamp = <210000>;

	status = "ok";
};

&sdhc_2 {
	vdd-supply = <&L13B>;
	qcom,vdd-voltage-level = <2960000 2960000>;
	qcom,vdd-current-level = <0 976310>;

	vdd-io-supply = <&L23B>;
	qcom,vdd-io-voltage-level = <1800000 2960000>;
	qcom,vdd-io-current-level = <0 5830>;

	pinctrl-names = "default", "sleep";
	pinctrl-0 = <&sdc2_on>;
	pinctrl-1 = <&sdc2_off>;

	cd-gpios = <&tlmm 39 GPIO_ACTIVE_LOW>;

	qcom,uses_level_shifter;

	status = "ok";
};

&usb0 {
	qcom,wcd_usbss = <&wcd_usbss>;
};

&regulator_ocp_notifier {
	periph-1c1-supply = <&L1B>;
	periph-1c2-supply = <&L2B>;
	periph-1c3-supply = <&L3B>;
	periph-1c4-supply = <&L4B>;
	periph-1c5-supply = <&L5B>;
	periph-1c6-supply = <&L6B>;
	periph-1c7-supply = <&L7B>;
	periph-1c8-supply = <&L8B>;
	periph-1c9-supply = <&L9B>;
	periph-1ca-supply = <&L10B>;
	periph-1cb-supply = <&L11B>;
	periph-1cc-supply = <&L12B>;
	periph-1cd-supply = <&L13B>;
	periph-1ce-supply = <&L14B>;
	periph-1cf-supply = <&L15B>;
	periph-1d0-supply = <&L16B>;
	periph-1d1-supply = <&L17B>;
	periph-1d2-supply = <&L18B>;
	periph-1d3-supply = <&L19B>;
	periph-1d4-supply = <&L20B>;
	periph-1d5-supply = <&L21B>;
	periph-1d6-supply = <&L22B>;
	periph-1d7-supply = <&L23B>;
	periph-19b-supply = <&S1B>;
	periph-19e-supply = <&S2B>;
	periph-1a1-supply = <&S3B>;
	periph-1e4-supply = <&BOB>;
	periph-3c1-supply = <&L1D>;
	periph-3c2-supply = <&L2D_LEVEL>;
	periph-3c3-supply = <&L3D>;
	periph-59b-supply = <&S1F_LEVEL>;
	periph-5a0-supply = <&S2F_LEVEL>;
	periph-5a8-supply = <&S4F>;
	periph-5a9-supply = <&S5F_LEVEL>;
	periph-5ac-supply = <&S8F_LEVEL>;
	periph-5c1-supply = <&L1F>;
	periph-5c2-supply = <&L2F_LEVEL>;
	periph-5c3-supply = <&L3F>;
	periph-6c1-supply = <&L1G>;
	periph-6c2-supply = <&L2G>;
	periph-6c3-supply = <&L3G>;
	periph-c40-supply = <&L1M>;
	periph-c41-supply = <&L2M>;
	periph-c42-supply = <&L3M>;
	periph-c43-supply = <&L4M>;
	periph-c44-supply = <&L5M>;
	periph-c45-supply = <&L6M>;
	periph-c46-supply = <&L7M>;
	periph-d40-supply = <&L1N>;
	periph-d41-supply = <&L2N>;
	periph-d42-supply = <&L3N>;
	periph-d43-supply = <&L4N>;
	periph-d44-supply = <&L5N>;
	periph-d45-supply = <&L6N>;
	periph-d46-supply = <&L7N>;
};