// SPDX-License-Identifier: BSD-3-Clause
/*
 * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
 */

&soc {
	/* CAM_CC GDSCs */
	cam_cc_bps_gdsc: qcom,gdsc@adf0004 {
		compatible = "qcom,gdsc";
		reg = <0xadf0004 0x4>;
		regulator-name = "cam_cc_bps_gdsc";
		qcom,retain-regs;
		qcom,support-hw-trigger;
		qcom,support-cfg-gdscr;
		status = "disabled";
	};

	cam_cc_ife_0_gdsc: qcom,gdsc@adf1004 {
		compatible = "qcom,gdsc";
		reg = <0xadf1004 0x4>;
		regulator-name = "cam_cc_ife_0_gdsc";
		qcom,retain-regs;
		qcom,support-cfg-gdscr;
		status = "disabled";
	};

	cam_cc_ife_1_gdsc: qcom,gdsc@adf2004 {
		compatible = "qcom,gdsc";
		reg = <0xadf2004 0x4>;
		regulator-name = "cam_cc_ife_1_gdsc";
		qcom,retain-regs;
		qcom,support-cfg-gdscr;
		status = "disabled";
	};

	cam_cc_ife_2_gdsc: qcom,gdsc@adf2054 {
		compatible = "qcom,gdsc";
		reg = <0xadf2054 0x4>;
		regulator-name = "cam_cc_ife_2_gdsc";
		qcom,retain-regs;
		qcom,support-cfg-gdscr;
		status = "disabled";
	};

	cam_cc_ipe_0_gdsc: qcom,gdsc@adf0080 {
		compatible = "qcom,gdsc";
		reg = <0xadf0080 0x4>;
		regulator-name = "cam_cc_ipe_0_gdsc";
		qcom,retain-regs;
		qcom,support-hw-trigger;
		qcom,support-cfg-gdscr;
		status = "disabled";
	};

	cam_cc_sbi_gdsc: qcom,gdsc@adf00e4 {
		compatible = "qcom,gdsc";
		reg = <0xadf00e4 0x4>;
		regulator-name = "cam_cc_sbi_gdsc";
		qcom,retain-regs;
		qcom,support-cfg-gdscr;
		status = "disabled";
	};

	cam_cc_sfe_0_gdsc: qcom,gdsc@adf3058 {
		compatible = "qcom,gdsc";
		reg = <0xadf3058 0x4>;
		regulator-name = "cam_cc_sfe_0_gdsc";
		qcom,retain-regs;
		qcom,support-cfg-gdscr;
		status = "disabled";
	};

	cam_cc_sfe_1_gdsc: qcom,gdsc@adf30a8 {
		compatible = "qcom,gdsc";
		reg = <0xadf30a8 0x4>;
		regulator-name = "cam_cc_sfe_1_gdsc";
		qcom,retain-regs;
		qcom,support-cfg-gdscr;
		status = "disabled";
	};

	cam_cc_sfe_2_gdsc: qcom,gdsc@adf30f8 {
		compatible = "qcom,gdsc";
		reg = <0xadf30f8 0x4>;
		regulator-name = "cam_cc_sfe_2_gdsc";
		qcom,retain-regs;
		qcom,support-cfg-gdscr;
		status = "disabled";
	};

	cam_cc_titan_top_gdsc: qcom,gdsc@adf32bc {
		compatible = "qcom,gdsc";
		reg = <0xadf32bc 0x4>;
		regulator-name = "cam_cc_titan_top_gdsc";
		qcom,retain-regs;
		qcom,support-cfg-gdscr;
		status = "disabled";
	};

	/* DISP_CC GDSCs */
	disp_cc_mdss_core_gdsc: qcom,gdsc@af09000 {
		compatible = "qcom,gdsc";
		reg = <0xaf09000 0x4>;
		regulator-name = "disp_cc_mdss_core_gdsc";
		proxy-supply = <&disp_cc_mdss_core_gdsc>;
		qcom,proxy-consumer-enable;
		qcom,support-hw-trigger;
		qcom,retain-regs;
		qcom,support-cfg-gdscr;
		status = "disabled";
	};

	disp_cc_mdss_core_int2_gdsc: qcom,gdsc@af0b000 {
		compatible = "qcom,gdsc";
		reg = <0xaf0b000 0x4>;
		regulator-name = "disp_cc_mdss_core_int2_gdsc";
		qcom,support-hw-trigger;
		qcom,retain-regs;
		qcom,support-cfg-gdscr;
		status = "disabled";
	};

	gcc_apcs_gdsc_vote_ctrl: syscon@15214c {
		compatible = "syscon";
		reg = <0x15214c 0x4>;
	};

	apss_ubwcp_pwr_ctrl: qcom,gdsc@17891000 {
		compatible = "qcom,gdsc";
		reg = <0x17891000 0x4>;
		regulator-name = "apss_ubwcp_pwr_ctrl";
		qcom,no-status-check-on-disable;
		status = "disabled";
	};

	/* GCC GDSCs */
	gcc_pcie_0_gdsc: qcom,gdsc@16b004 {
		compatible = "qcom,gdsc";
		reg = <0x16b004 0x4>;
		regulator-name = "gcc_pcie_0_gdsc";
		qcom,retain-regs;
		qcom,no-status-check-on-disable;
		qcom,collapse-vote = <&gcc_apcs_gdsc_vote_ctrl 0>;
		qcom,support-cfg-gdscr;
		status = "disabled";
	};

	gcc_pcie_0_phy_gdsc: qcom,gdsc@16c000 {
		compatible = "qcom,gdsc";
		reg = <0x16c000 0x4>;
		regulator-name = "gcc_pcie_0_phy_gdsc";
		qcom,retain-regs;
		qcom,no-status-check-on-disable;
		qcom,collapse-vote = <&gcc_apcs_gdsc_vote_ctrl 3>;
		qcom,support-cfg-gdscr;
		status = "disabled";
	};

	gcc_pcie_1_gdsc: qcom,gdsc@18d004 {
		compatible = "qcom,gdsc";
		reg = <0x18d004 0x4>;
		regulator-name = "gcc_pcie_1_gdsc";
		qcom,retain-regs;
		qcom,no-status-check-on-disable;
		qcom,collapse-vote = <&gcc_apcs_gdsc_vote_ctrl 1>;
		qcom,support-cfg-gdscr;
		status = "disabled";
	};

	gcc_pcie_1_phy_gdsc: qcom,gdsc@18e000 {
		compatible = "qcom,gdsc";
		reg = <0x18e000 0x4>;
		regulator-name = "gcc_pcie_1_phy_gdsc";
		qcom,retain-regs;
		qcom,no-status-check-on-disable;
		qcom,collapse-vote = <&gcc_apcs_gdsc_vote_ctrl 4>;
		qcom,support-cfg-gdscr;
		status = "disabled";
	};

	gcc_ufs_mem_phy_gdsc: qcom,gdsc@19e000 {
		compatible = "qcom,gdsc";
		reg = <0x19e000 0x4>;
		regulator-name = "gcc_ufs_mem_phy_gdsc";
		proxy-supply = <&gcc_ufs_mem_phy_gdsc>;
		qcom,proxy-consumer-enable;
		qcom,retain-regs;
		qcom,support-cfg-gdscr;
		status = "disabled";
	};

	gcc_ufs_phy_gdsc: qcom,gdsc@177004 {
		compatible = "qcom,gdsc";
		reg = <0x177004 0x4>;
		regulator-name = "gcc_ufs_phy_gdsc";
		proxy-supply = <&gcc_ufs_phy_gdsc>;
		qcom,proxy-consumer-enable;
		qcom,retain-regs;
		qcom,support-cfg-gdscr;
		status = "disabled";
	};

	gcc_usb30_prim_gdsc: qcom,gdsc@139004 {
		compatible = "qcom,gdsc";
		reg = <0x139004 0x4>;
		regulator-name = "gcc_usb30_prim_gdsc";
		proxy-supply = <&gcc_usb30_prim_gdsc>;
		qcom,proxy-consumer-enable;
		qcom,retain-regs;
		qcom,support-cfg-gdscr;
		status = "disabled";
	};

	gcc_usb3_phy_gdsc: qcom,gdsc@150018 {
		compatible = "qcom,gdsc";
		reg = <0x150018 0x4>;
		regulator-name = "gcc_usb3_phy_gdsc";
		proxy-supply = <&gcc_usb3_phy_gdsc>;
		qcom,proxy-consumer-enable;
		qcom,retain-regs;
		qcom,support-cfg-gdscr;
		status = "disabled";
	};

	/* GPU_CC GDSCs */
	gpu_cc_cx_gdsc_hw_ctrl: syscon@3d99168 {
		compatible = "syscon";
		reg = <0x3d99168 0x4>;
	};

	gpu_cc_cx_gdsc: qcom,gdsc@3d99108 {
		compatible = "qcom,gdsc";
		reg = <0x3d99108 0x4>;
		regulator-name = "gpu_cc_cx_gdsc";
		hw-ctrl-addr = <&gpu_cc_cx_gdsc_hw_ctrl>;
		qcom,no-status-check-on-disable;
		qcom,clk-dis-wait-val = <8>;
		qcom,retain-regs;
		qcom,support-cfg-gdscr;
		status = "disabled";
	};

	gpu_cc_gx_domain_addr: syscon@3d99504 {
		compatible = "syscon";
		reg = <0x3d99504 0x4>;
	};

	gpu_cc_gx_sw_reset: syscon@3d99058 {
		compatible = "syscon";
		reg = <0x3d99058 0x4>;
	};

	gpu_cc_gx_acd_reset: syscon@3d99358 {
		compatible = "syscon";
		reg = <0x3d99358 0x4>;
	};

	gpu_cc_gx_acd_iroot_reset: syscon@3d9958c {
		compatible = "syscon";
		reg = <0x3d9958c 0x4>;
	};

	gpu_cc_gx_gdsc: qcom,gdsc@3d9905c {
		compatible = "qcom,gdsc";
		reg = <0x3d9905c 0x4>;
		regulator-name = "gpu_cc_gx_gdsc";
		domain-addr = <&gpu_cc_gx_domain_addr>;
		sw-reset = <&gpu_cc_gx_sw_reset>,
			   <&gpu_cc_gx_acd_reset>,
			   <&gpu_cc_gx_acd_iroot_reset>;
		qcom,reset-aon-logic;
		qcom,retain-regs;
		qcom,support-cfg-gdscr;
		status = "disabled";
	};

	/* VIDEO_CC GDSCs */
	video_cc_mvs0_gdsc: qcom,gdsc@aaf80a4 {
		compatible = "qcom,gdsc";
		reg = <0xaaf80a4 0x4>;
		regulator-name = "video_cc_mvs0_gdsc";
		qcom,retain-regs;
		qcom,support-hw-trigger;
		qcom,support-cfg-gdscr;
		status = "disabled";
	};

	video_cc_mvs0c_gdsc: qcom,gdsc@aaf804c {
		compatible = "qcom,gdsc";
		reg = <0xaaf804c 0x4>;
		regulator-name = "video_cc_mvs0c_gdsc";
		qcom,retain-regs;
		qcom,support-cfg-gdscr;
		status = "disabled";
	};

	video_cc_mvs1_gdsc: qcom,gdsc@aaf80cc {
		compatible = "qcom,gdsc";
		reg = <0xaaf80cc 0x4>;
		regulator-name = "video_cc_mvs1_gdsc";
		qcom,retain-regs;
		qcom,support-hw-trigger;
		qcom,support-cfg-gdscr;
		status = "disabled";
	};

	video_cc_mvs1c_gdsc: qcom,gdsc@aaf8078 {
		compatible = "qcom,gdsc";
		reg = <0xaaf8078 0x4>;
		regulator-name = "video_cc_mvs1c_gdsc";
		qcom,retain-regs;
		qcom,support-cfg-gdscr;
		status = "disabled";
	};
};