// SPDX-License-Identifier: BSD-3-Clause /* * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "tuna-sde-display.dtsi" &L3D { qcom,init-voltage = <1090000>; }; &dsi_panel_pwr_supply { qcom,panel-supply-entry@1 { qcom,supply-min-voltage = <1090000>; qcom,supply-max-voltage = <1100000>; }; }; &dsi_nt37801_amoled_cmd { qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs"; qcom,mdss-dsi-bl-min-level = <10>; qcom,mdss-dsi-bl-max-level = <4095>; qcom,mdss-brightness-max-level = <8191>; qcom,mdss-dsi-bl-inverted-dbv; qcom,platform-reset-gpio = <&tlmm 14 0>; qcom,platform-sec-reset-gpio = <&tlmm 126 0>; }; &dsi_nt37801_amoled_video { qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs"; qcom,mdss-dsi-bl-min-level = <10>; qcom,mdss-dsi-bl-max-level = <4095>; qcom,mdss-brightness-max-level = <8191>; qcom,mdss-dsi-bl-inverted-dbv; qcom,platform-reset-gpio = <&tlmm 14 0>; qcom,platform-sec-reset-gpio = <&tlmm 126 0>; }; &dsi_nt37801_amoled_dsc_10b_cmd { qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; qcom,mdss-dsi-bl-min-level = <10>; qcom,mdss-dsi-bl-max-level = <4095>; qcom,mdss-brightness-max-level = <8191>; qcom,mdss-dsi-bl-inverted-dbv; qcom,platform-reset-gpio = <&tlmm 14 0>; qcom,platform-sec-reset-gpio = <&tlmm 126 0>; }; &dsi_nt37801_amoled_dsc_10b_video { qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; qcom,mdss-dsi-bl-min-level = <10>; qcom,mdss-dsi-bl-max-level = <4095>; qcom,mdss-brightness-max-level = <8191>; qcom,mdss-dsi-bl-inverted-dbv; qcom,platform-reset-gpio = <&tlmm 14 0>; qcom,platform-sec-reset-gpio = <&tlmm 126 0>; }; &dsi_nt37801_amoled_cmd_spr { qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; qcom,mdss-dsi-bl-min-level = <10>; qcom,mdss-dsi-bl-max-level = <4095>; qcom,mdss-brightness-max-level = <8191>; qcom,mdss-dsi-bl-inverted-dbv; qcom,platform-reset-gpio = <&tlmm 14 0>; qcom,platform-sec-reset-gpio = <&tlmm 126 0>; }; &dsi_nt37801_amoled_vid_spr { qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; qcom,mdss-dsi-bl-min-level = <10>; qcom,mdss-dsi-bl-max-level = <4095>; qcom,mdss-brightness-max-level = <8191>; qcom,mdss-dsi-bl-inverted-dbv; qcom,platform-reset-gpio = <&tlmm 14 0>; qcom,platform-sec-reset-gpio = <&tlmm 126 0>; }; &dsi_nt37801_amoled_qsync_cmd { qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; qcom,mdss-dsi-bl-min-level = <10>; qcom,mdss-dsi-bl-max-level = <4095>; qcom,mdss-brightness-max-level = <8191>; qcom,mdss-dsi-bl-inverted-dbv; qcom,platform-reset-gpio = <&tlmm 14 0>; qcom,platform-sec-reset-gpio = <&tlmm 126 0>; }; &dsi_nt37801_amoled_qsync_video { qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; qcom,mdss-dsi-bl-min-level = <10>; qcom,mdss-dsi-bl-max-level = <4095>; qcom,mdss-brightness-max-level = <8191>; qcom,mdss-dsi-bl-inverted-dbv; qcom,platform-reset-gpio = <&tlmm 14 0>; qcom,platform-sec-reset-gpio = <&tlmm 126 0>; }; &dsi_nt37801_amoled_fhd_plus_cmd { qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; qcom,mdss-dsi-bl-min-level = <10>; qcom,mdss-dsi-bl-max-level = <4095>; qcom,mdss-brightness-max-level = <8191>; qcom,mdss-dsi-bl-inverted-dbv; qcom,platform-reset-gpio = <&tlmm 14 0>; qcom,platform-sec-reset-gpio = <&tlmm 126 0>; }; &dsi_nt37801_amoled_cmd_ddicspr { qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs"; qcom,mdss-dsi-bl-min-level = <10>; qcom,mdss-dsi-bl-max-level = <4095>; qcom,mdss-brightness-max-level = <8191>; qcom,mdss-dsi-bl-inverted-dbv; qcom,platform-reset-gpio = <&tlmm 14 0>; qcom,platform-sec-reset-gpio = <&tlmm 126 0>; }; &dsi_nt37801_amoled_video_ddicspr { qcom,panel-supply-entries = <&dsi_panel_pwr_supply>; qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs"; qcom,mdss-dsi-bl-min-level = <10>; qcom,mdss-dsi-bl-max-level = <4095>; qcom,mdss-brightness-max-level = <8191>; qcom,mdss-dsi-bl-inverted-dbv; qcom,platform-reset-gpio = <&tlmm 14 0>; qcom,platform-sec-reset-gpio = <&tlmm 126 0>; }; &dsi_sim_cmd { qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; }; &dsi_sim_vid { qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; }; &dsi_sim_dsc_375_cmd { qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; }; &dsi_sim_dsc_10b_cmd { qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; }; &dsi_dual_sim_cmd { qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; qcom,bl-dsc-cmd-state = "dsi_lp_mode"; }; &dsi_dual_sim_dsc_375_cmd { qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; }; &dsi_sim_sec_hd_cmd { qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>; qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>; qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs"; qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs"; qcom,mdss-dsi-bl-min-level = <1>; qcom,mdss-dsi-bl-max-level = <1023>; }; &sde_dsi { qcom,dsi-default-panel = <&dsi_nt37801_amoled_cmd>; }; &qupv3_se4_i2c { st_fts@49 { panel = <&dsi_nt37801_amoled_cmd &dsi_nt37801_amoled_video &dsi_nt37801_amoled_dsc_10b_cmd &dsi_nt37801_amoled_dsc_10b_video &dsi_nt37801_amoled_cmd_spr &dsi_nt37801_amoled_vid_spr &dsi_nt37801_amoled_qsync_cmd &dsi_nt37801_amoled_qsync_video &dsi_nt37801_amoled_fhd_plus_cmd &dsi_nt37801_amoled_cmd_ddicspr &dsi_nt37801_amoled_video_ddicspr>; }; };