// SPDX-License-Identifier: BSD-3-Clause
/*
 * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved.
 */

#include <bindings/qcom,audio-ext-clk.h>
#include <bindings/qcom,gpr.h>
#include "msm-audio-lpass.dtsi"

&soc {
	spf_core_platform: spf_core_platform {
		compatible = "qcom,spf-core-platform";
	};

	lpass_core_hw_vote: vote_lpass_core_hw {
		compatible = "qcom,audio-ref-clk";
		qcom,codec-ext-clk-src = <AUDIO_LPASS_CORE_HW_VOTE>;
		#clock-cells = <1>;
	};

	lpass_audio_hw_vote: vote_lpass_audio_hw {
		compatible = "qcom,audio-ref-clk";
		qcom,codec-ext-clk-src = <AUDIO_LPASS_AUDIO_HW_VOTE>;
		#clock-cells = <1>;
	};
};

&glink_edge {
	audio_gpr: qcom,gpr {
		compatible = "qcom,gpr";
		qcom,glink-channels = "adsp_apps";
		qcom,intents = <0x200 20>;
		reg = <GPR_DOMAIN_ADSP>;

		spf_core {
			compatible = "qcom,spf_core";
			reg = <GPR_SVC_ADSP_CORE>;
		};

		audio-pkt {
			compatible = "qcom,audio-pkt";
			qcom,audiopkt-ch-name = "apr_audio_svc";
			reg = <GPR_SVC_MAX>;
		};

		audio_prm: q6prm {
			compatible = "qcom,audio_prm";
			reg = <GPR_SVC_ASM>;
		};
	};
};

&spf_core_platform {

	msm_audio_ion: qcom,msm-audio-ion {
		compatible = "qcom,msm-audio-ion";
		qcom,smmu-version = <2>;
		qcom,smmu-enabled;
		iommus = <&apps_smmu 0x1001 0x0080>, <&apps_smmu 0x1061 0x0>;
		qcom,iommu-dma-addr-pool = <0x10000000 0x10000000>;
		qcom,smmu-sid-mask = /bits/ 64 <0xf>;
		dma-coherent;
	};

	msm_audio_ion_cma: qcom,msm-audio-ion-cma {
		compatible = "qcom,msm-audio-ion-cma";
	};

	lpi_tlmm: lpi_pinctrl@6E80000 {
		compatible = "qcom,lpi-pinctrl";
		reg = <0x6E80000 0x0>;
		qcom,gpios-count = <23>;
		qcom,slew-reg = <0x6E80000 0x0>;
		gpio-controller;
		#gpio-cells = <2>;
		qcom,lpi-offset-tbl = <0x00000000>, <0x00001000>,
					<0x00002000>, <0x00003000>,
					<0x00004000>, <0x00005000>,
					<0x00006000>, <0x00007000>,
					<0x00008000>, <0x00009000>,
					<0x0000A000>, <0x0000B000>,
					<0x0000C000>, <0x0000D000>,
					<0x0000E000>, <0x0000F000>,
					<0x00010000>, <0x00011000>,
					<0x00012000>, <0x00013000>,
					<0x00014000>, <0x00015000>,
					<0x00016000>;
		qcom,lpi-slew-offset-tbl = <0x0000000B>, <0x0000000B>,
						<0x0000000B>, <0x0000000B>,
						<0x0000000B>, <0x0000000B>,
						<0x0000000B>, <0x0000000B>,
						<0x0000000B>, <0x0000000B>,
						<0x0000000B>, <0x0000000B>,
						<0x0000000B>, <0x0000000B>,
						<0x0000000B>, <0x0000000B>,
						<0x0000000B>, <0x0000000B>,
						<0x0000000B>, <0x0000000B>,
						<0x0000000B>, <0x0000000B>,
						<0x0000000B>;

		qcom,lpi-slew-base-tbl = <0x6E80000>, <0x6E81000>,
						<0x6E82000>, <0x6E83000>,
						<0x6E84000>, <0x6E85000>,
						<0x6E86000>, <0x6E87000>,
						<0x6E88000>, <0x6E89000>,
						<0x6E8A000>, <0x6E8B000>,
						<0x6E8C000>, <0x6E8D000>,
						<0x6E8E000>, <0x6E8F000>,
						<0x6E90000>, <0x6E91000>,
						<0x6E92000>, <0x6E93000>,
						<0x6E94000>, <0x6E95000>,
						<0x6E96000>;

		clock-names = "lpass_core_hw_vote",
				"lpass_audio_hw_vote";
		clocks = <&lpass_core_hw_vote 0>,
				<&lpass_audio_hw_vote 0>;
	};

	lpass_cdc: lpass-cdc {
		compatible = "qcom,lpass-cdc";
		clock-names = "lpass_core_hw_vote",
				"lpass_audio_hw_vote";
		clocks = <&lpass_core_hw_vote 0>,
				<&lpass_audio_hw_vote 0>;
		lpass-cdc-clk-rsc-mngr {
			compatible = "qcom,lpass-cdc-clk-rsc-mngr";
		};

		va_macro: va-macro@6D44000 {
			swr2: va_swr_master {
			};
		};

		tx_macro: tx-macro@6AE0000 {
		};

		rx_macro: rx-macro@6AC0000 {
			swr1: rx_swr_master {
			};
		};

		wsa_macro: wsa-macro@6B00000 {
			swr0: wsa_swr_master {
			};
		};

		wsa2_macro: wsa2-macro@6AA0000 {
			swr3: wsa2_swr_master {
			};
		};
	};

	pineapple_snd: sound {
		compatible = "qcom,pineapple-asoc-snd";
		qcom,mi2s-audio-intf = <1>;
		qcom,tdm-audio-intf = <0>;
		qcom,auxpcm-audio-intf = <1>;
		qcom,wcn-bt = <0>;
		qcom,ext-disp-audio-rx = <0>;
		qcom,afe-rxtx-lb = <0>;

		clock-names = "lpass_audio_hw_vote";
		clocks = <&lpass_audio_hw_vote 0>;
		wcd939x-i2c-handle = <&wcd_usbss>;
	};
};

&aliases {
	swr0 = "/soc/spf_core_platform/lpass-cdc/wsa-macro@6B00000/wsa_swr_master";
	swr1 = "/soc/spf_core_platform/lpass-cdc/rx-macro@6AC0000/rx_swr_master";
	swr2 = "/soc/spf_core_platform/lpass-cdc/va-macro@6D44000/va_swr_master";
	swr3 = "/soc/spf_core_platform/lpass-cdc/wsa2-macro@6AA0000/wsa2_swr_master";
};