# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/spi/qcom,q2spi-msm-geni.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: GENI based Qualcomm Universal Peripheral (QUP) Qualcomm Host-Client 2-Way Transport (Q2SPI)

maintainers:
  - Chandana Kishori Chiluveru <quic_cchiluve@quicinc.com>
  - Visweswara Tanuku <quic_vtanuku@quicinc.com>
  - Mukesh Kumar Savaliya <quic_msavaliy@quicinc.com>

description:
   GENI based Qualcomm Technologies Inc Universal Peripheral version 5 (QUPv3)
   Serial Peripheral Interface (SPI)
   The QUP v3 core is a GENI based AHB slave that provides a common data path
   (an output FIFO and an input FIFO) for serial peripheral interface (SPI) mini-core.

   SPI in master mode supports up to 100MHz, chipselect less mode and up to four chip selects,
   programmable data path from 4 bits to 32 bits and numerous protocol variants.

properties:
  compatible:
    const: qcom,q2spi-geni

  clocks:
    maxItems: 1

  clock-names:
    const: se-clk

  pinctrl-0: true
  pinctrl-1: true

  pinctrl-names:
    minItems: 1
    items:
      - const: default
      - const: sleep

  dmas:
    maxItems: 2

  dma-names:
    items:
      - const: tx
      - const: rx

  interconnects:
    minItems: 2
    maxItems: 3

  interconnect-names:
    minItems: 2
    items:
      - const: qup-core
      - const: qup-config
      - const: qup-memory

  interrupts:
    maxItems: 1

  reg:
    maxItems: 1

  reg-names:
    maxItems: 1

  q2spi-max-frequency:
    maxItems: 1

required:
  - compatible
  - reg
  - clocks
  - clock-names
  - interrupts
  - pinctrl-names
  - q2spi-max-frequency

examples:
  - |
    qupv3_se13_q2spi: q2spi@894000 {
        compatible = "qcom,q2spi-msm-geni";
        reg = <0x894000 0x4000>;
        #address-cells = <1>;
        #size-cells = <0>;
        reg-names = "se_phys";
        interrupts = <GIC_SPI 587 IRQ_TYPE_LEVEL_HIGH>;
        clock-names = "se-clk";
        clocks = <&gcc GCC_QUPV3_WRAP2_S5_CLK>;
        interconnect-names = "qup-core", "qup-config", "qup-memory";
        interconnects =
                   <&clk_virt MASTER_QUP_CORE_2 &clk_virt SLAVE_QUP_CORE_2>,
                   <&gem_noc MASTER_APPSS_PROC &config_noc SLAVE_QUP_2>,
                   <&aggre2_noc MASTER_QUP_2 &mc_virt  SLAVE_EBI1>;
        pinctrl-names = "default", "sleep";
        pinctrl-0 = <&qupv3_se13_q2spi_mosi_active>, <&qupv3_se13_q2spi_miso_active>,
                    <&qupv3_se13_q2spi_clk_active>, <&qupv3_se13_q2spi_doorbell_active>;
        pinctrl-1 = <&qupv3_se13_q2spi_sleep>, <&qupv3_se13_q2spi_miso_sleep>;
        dmas = <&gpi_dma2 0 5 14 64 0>,
               <&gpi_dma2 1 5 14 64 0>;
        dma-names = "tx", "rx";
        q2spi-max-frequency = <10000000>;
        status = "ok";
 };
...