# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
%YAML 1.2
---
$id: http://devicetree.org/schemas/sde-dp.yaml#
$schema: http://devicetree.org/meta-schemas/core.yaml#

title: SDE DP

description: |
  sde-dp is the master Display Port device which supports DP host controllers that are compatible
  with VESA Display Port interface specification.
  msm_ext_disp is a device which manages the interaction between external
  display interfaces, e.g. Display Port, and the audio subsystem.
  [Optional child nodes]: These nodes are for devices which are
  dependent on msm_ext_disp. If msm_ext_disp is disabled then
  these devices will be disabled as well. Ex. Audio Codec device.

maintainers:
  - Rajkumar Subbiah <quic_rsubbia@quicinc.com>
  - Vishnuvardhan Prodduturi <quic_vproddut@quicinc.com>

properties:
  compatible:
    const: qcom,dp-display

  reg:
    description: |
      Base address and length of DP hardware's memory mapped regions.

  reg-names:
    description: |
      A list of strings that name the list of regs. "dp_ctrl" - DP controller memory region.
      "dp_ahb" - AHB memory region.
      "dp_aux" - AUX memory region.
      "dp_link" - LINK memory region.
      "dp_p0" - PCLK0 memory region.
      "dp_phy" - PHY memory region.
      "dp_ln_tx0" - USB3 DP PHY combo TX-0 lane memory region.
      "dp_ln_tx1" - USB3 DP PHY combo TX-1 lane memory region.
      "dp_mmss_cc" - Display Clock Control memory region.
      "dp_pll" - USB3 DP combo PLL memory region.
      "usb3_dp_com" - USB3 DP PHY combo memory region.
      "hdcp_physical" - DP HDCP memory region.
      "dp_p1" - DP PCLK1 memory region.
      "gdsc" - DISPCC GDSC memory region.

  cell-index:
    description: Specifies the controller instance.

  '#clock-cells':
    description: Denotes the DP driver as a clock producer (has one or more clock outputs)

  clocks:
    description: Clocks required for Display Port operation.

  clock-names:
    items:
      - const: core_aux_clk
      - const: core_usb_ref_clk_src
      - const: core_usb_pipe_clk
      - const: link_clk
      - const: link_clk_src
      - const: link_iface_clk
      - const: pixel_clk_rcg
      - const: pixel_parent
      - const: pixel1_clk_rcg
      - const: strm0_pixel_clk
      - const: strm1_pixel_clk

  vdda-1p2-supply:
    description: phandle to vdda 1.2V regulator node.
    $ref: /schemas/types.yaml#/definitions/phandle

  vdda-0p9-supply:
    description: phandle to vdda 0.9V regulator node.
    $ref: /schemas/types.yaml#/definitions/phandle

  interrupt-parent:
    description: phandle to the interrupt parent device node.
    $ref: /schemas/types.yaml#/definitions/phandle

  interrupts:
    description: The interrupt signal from the DSI block.

  qcom,aux-cfg0-settings:
    description: |
      Specifies the DP AUX configuration 0 settings. The first
      entry in this array corresponds to the register offset
      within DP AUX, while the remaining entries indicate the
      programmable values.

  qcom,aux-cfg1-settings:
    description: |
      Specifies the DP AUX configuration 1 settings. The first
      entry in this array corresponds to the register offset
      within DP AUX, while the remaining entries indicate the
      programmable values.

  qcom,aux-cfg2-settings:
    description: |
      Specifies the DP AUX configuration 2 settings. The first
      entry in this array corresponds to the register offset
      within DP AUX, while the remaining entries indicate the
      programmable values.

  qcom,aux-cfg3-settings:
    description: |
      Specifies the DP AUX configuration 3 settings. The first
      entry in this array corresponds to the register offset
      within DP AUX, while the remaining entries indicate the
      programmable values.

  qcom,aux-cfg4-settings:
    description: |
      Specifies the DP AUX configuration 4 settings. The first
      entry in this array corresponds to the register offset
      within DP AUX, while the remaining entries indicate the
      programmable values.

  qcom,aux-cfg5-settings:
    description: |
      Specifies the DP AUX configuration 5 settings. The first
      entry in this array corresponds to the register offset
      within DP AUX, while the remaining entries indicate the
      programmable values.

  qcom,aux-cfg6-settings:
    description: |
      Specifies the DP AUX configuration 6 settings. The first
      entry in this array corresponds to the register offset
      within DP AUX, while the remaining entries indicate the
      programmable values.

  qcom,aux-cfg7-settings:
    description: |
      Specifies the DP AUX configuration 7 settings. The first
      entry in this array corresponds to the register offset
      within DP AUX, while the remaining entries indicate the
      programmable values.

  qcom,aux-cfg8-settings:
    description: |
      Specifies the DP AUX configuration 8 settings. The first
      entry in this array corresponds to the register offset
      within DP AUX, while the remaining entries indicate the
      programmable values.

  qcom,aux-cfg9-settings:
    description: |
      Specifies the DP AUX configuration 9 settings. The first
      entry in this array corresponds to the register offset
      within DP AUX, while the remaining entries indicate the
      programmable values.

  qcom,max-pclk-frequency-khz:
    description: An integer specifying the max. pixel clock in KHz supported by Display Port.
    $ref: /schemas/types.yaml#/definitions/uint32

  qcom,mst-enable:
    description: MST feature enable control node.

  qcom,dsc-feature-enable:
    description: DSC feature enable control node.

  qcom,fec-feature-enable:
    description: FEC feature enable control node.

  qcom,qos-cpu-mask:
    description: A u32 value indicating desired PM QoS CPU affine mask
    $ref: /schemas/types.yaml#/definitions/uint32

  qcom,qos-cpu-latency-us:
    description: A u32 value indicating desired PM QoS CPU latency in usec
    $ref: /schemas/types.yaml#/definitions/uint32

  qcom,altmode-dev:
    description: Phandle for the AltMode GLink driver.
    $ref: /schemas/types.yaml#/definitions/phandle

  usb-controller:
    description: Phandle for the USB controller.
    $ref: /schemas/types.yaml#/definitions/phandle

  qcom,pll-revision:
    description: PLL hardware revision.

  usb-phy:
    description: Phandle for USB PHY driver. This is used to register for USB cable events.
    $ref: /schemas/types.yaml#/definitions/phandle

  qcom,dsc-continuous-pps:
    description: |
      Control node for sending PPS every frame in hardware for DSC over DP.
      This is needed by certain bridge chips where there is such a requirement to do so.

  qcom,dp-aux-switch:
    description: Phandle for the driver used to program the AUX switch for Display Port orientation.
    $ref: /schemas/types.yaml#/definitions/phandle

  qcom,dp-hpd-gpio:
    description: HPD gpio for direct DP connector without USB PHY or AUX switch.

  qcom,dp-gpio-aux-switch:
    description: Gpio DP AUX switch chipset support.

  clock-mmrm:
    description: |
      List of the clocks that enable setting the clk rate through MMRM driver.
      The order of the list must match the 'clocks' and 'clock-names'
      properties. The 'DISP_CC' ID of the clock must be used to enable
      the property for the respective clock, whereas a value of zero
      disables the property.

  vdd_mx-supply:
    description: phandle to vdda MX regulator node
    $ref: /schemas/types.yaml#/definitions/phandle

  qcom,aux-en-gpio:
    description: Specifies the aux-channel enable gpio.

  qcom,aux-sel-gpio:
    description: Specifies the aux-channel select gpio.

  qcom,usbplug-cc-gpio:
    description: Specifies the usbplug orientation gpio.

  qcom,ext-disp:
    description: phandle for msm-ext-display module
    $ref: /schemas/types.yaml#/definitions/phandle

  compatible:
    const: qcom,msm-ext-disp

  qcom,dp-low-power-hw-hpd:
    description: Low power hardware HPD feature enable control node

  qcom,phy-version:
    description: Phy version

  pinctrl-names:
    description: |
      List of names to assign mdss pin states defined in pinctrl device node
      Refer to pinctrl-bindings.txt

  pinctrl-<0..n>:
    description: |
      Lists phandles each pointing to the pin configuration node within a pin
      controller. These pin configurations are installed in the pinctrl
      device node. Refer to pinctrl-bindings.txt

  qcom,max-lclk-frequency-khz:
    description: An integer specifying the max. link clock in KHz supported by Display Port.

  qcom,mst-fixed-topology-ports:
    description: u32 values of which MST output port to reserve, start from one
    $ref: /schemas/types.yaml#/definitions/uint32

  qcom,hbr-rbr-voltage-swing:
    description: Specifies the voltage swing levels for HBR and RBR rates.

  qcom,hbr-rbr-pre-emphasis:
    description: Specifies the pre-emphasis levels for HBR and RBR rates.

  qcom,hbr2-3-voltage-swing:
    description: Specifies the voltage swing levels for HBR2 and HBR3 rates.

  qcom,hbr2-3-pre-emphasis:
    description: Specifies the pre-emphasis levels for HBR2 and HBR3 rates.

  compatible:
   const: qcom,msm-ext-disp-audio-codec-rx

  ext_disp_audio_codec:
    description: Node for Audio Codec.

pattern properties:
  "qcom,+\w+\-supply\-entries":
    description: |
      A node that lists the elements of the supply used by the
      a particular "type" of DSI module. The module "types"
      can be "core", "ctrl", and "phy". Within the same type,
      there can be more than one instance of this binding,
      in which case the entry would be appended with the
      supply entry index.
      e.g. qcom,ctrl-supply-entry@0
    type: object
    patternProperties:
      "qcom,ctrl\-supply\-entry\@+\w":
        properties:
          reg:
            description: offset and length of the register set for the device.
          qcom,supply-name:
            description: name of the supply (vdd/vdda/vddio)
            $ref: /schemas/types.yaml#/definitions/string-array
          qcom,supply-min-voltage:
            description: minimum voltage level (uV)
            $ref: /schemas/types.yaml#/definitions/uint32
          qcom,supply-max-voltage:
            description: maximum voltage level (uV)
            $ref: /schemas/types.yaml#/definitions/uint32
          qcom,supply-enable-load:
            description: load drawn (uA) from enabled supply
            $ref: /schemas/types.yaml#/definitions/uint32
          qcom,supply-disable-load:
            description: load drawn (uA) from disabled supply
            $ref: /schemas/types.yaml#/definitions/uint32
          qcom,supply-pre-on-sleep:
            description: time to sleep (ms) before turning on
            $ref: /schemas/types.yaml#/definitions/uint32
          qcom,supply-post-on-sleep:
            description: time to sleep (ms) after turning on
            $ref: /schemas/types.yaml#/definitions/uint32
          qcom,supply-pre-off-sleep:
            description: time to sleep (ms) before turning off
            $ref: /schemas/types.yaml#/definitions/uint32
          qcom,supply-post-off-sleep:
            description: time to sleep (ms) after turning off
            $ref: /schemas/types.yaml#/definitions/uint32
      "qcom,core\-supply\-entry\@+\w":
        properties:
          reg:
            description: offset and length of the register set for the device.
          qcom,supply-name:
            description: name of the supply (vdd/vdda/vddio)
            $ref: /schemas/types.yaml#/definitions/string-array
          qcom,supply-min-voltage:
            description: minimum voltage level (uV)
            $ref: /schemas/types.yaml#/definitions/uint32
          qcom,supply-max-voltage:
            description: maximum voltage level (uV)
            $ref: /schemas/types.yaml#/definitions/uint32
          qcom,supply-enable-load:
            description: load drawn (uA) from enabled supply
            $ref: /schemas/types.yaml#/definitions/uint32
          qcom,supply-disable-load:
            description: load drawn (uA) from disabled supply
            $ref: /schemas/types.yaml#/definitions/uint32
          qcom,supply-pre-on-sleep:
            description: time to sleep (ms) before turning on
            $ref: /schemas/types.yaml#/definitions/uint32
          qcom,supply-post-on-sleep:
            description: time to sleep (ms) after turning on
            $ref: /schemas/types.yaml#/definitions/uint32
          qcom,supply-pre-off-sleep:
            description: time to sleep (ms) before turning off
            $ref: /schemas/types.yaml#/definitions/uint32
          qcom,supply-post-off-sleep:
            description: time to sleep (ms) after turning off
            $ref: /schemas/types.yaml#/definitions/uint32
      "qcom,phy\-supply\-entry\@+\w":
        properties:
          reg:
            description: offset and length of the register set for the device.
          qcom,supply-name:
            description: name of the supply (vdd/vdda/vddio)
            $ref: /schemas/types.yaml#/definitions/string-array
          qcom,supply-min-voltage:
            description: minimum voltage level (uV)
            $ref: /schemas/types.yaml#/definitions/uint32
          qcom,supply-max-voltage:
            description: maximum voltage level (uV)
            $ref: /schemas/types.yaml#/definitions/uint32
          qcom,supply-enable-load:
            description: load drawn (uA) from enabled supply
            $ref: /schemas/types.yaml#/definitions/uint32
          qcom,supply-disable-load:
            description: load drawn (uA) from disabled supply
            $ref: /schemas/types.yaml#/definitions/uint32
          qcom,supply-pre-on-sleep:
            description: time to sleep (ms) before turning on
            $ref: /schemas/types.yaml#/definitions/uint32
          qcom,supply-post-on-sleep:
            description: time to sleep (ms) after turning on
            $ref: /schemas/types.yaml#/definitions/uint32
          qcom,supply-pre-off-sleep:
            description: time to sleep (ms) before turning off
            $ref: /schemas/types.yaml#/definitions/uint32
          qcom,supply-post-off-sleep:
            description: time to sleep (ms) after turning off
            $ref: /schemas/types.yaml#/definitions/uint32

required:
  - compatible
  - reg
  - reg-names
  - cell-index
  - '#clock-cells'
  - clocks
  - clock-names
  - vdda-1p2-supply
  - vdda-0p9-supply
  - interrupt-parent
  - interrupts
  - qcom,aux-cfg0-settings
  - qcom,aux-cfg1-settings
  - qcom,aux-cfg2-settings
  - qcom,aux-cfg3-settings
  - qcom,aux-cfg4-settings
  - qcom,aux-cfg5-settings
  - qcom,aux-cfg6-settings
  - qcom,aux-cfg7-settings
  - qcom,aux-cfg8-settings
  - qcom,aux-cfg9-settings
  - qcom,max-pclk-frequency-khz
  - qcom,mst-enable
  - qcom,dsc-feature-enable
  - qcom,fec-feature-enable
  - qcom,qos-cpu-mask
  - qcom,qos-cpu-latency-us
  - qcom,altmode-dev
  - usb-controller
  - qcom,pll-revision
  - usb-phy
  - qcom,dp-aux-switch
  - qcom,dp-hpd-gpio
  - qcom,dp-gpio-aux-switch
  - qcom,<type>-supply-entries

examples:
  - |
    ext_disp: qcom,msm-ext-disp {
      compatible = "qcom,msm-ext-disp";

      ext_disp_audio_codec: qcom,msm-ext-disp-audio-codec-rx {
        compatible = "qcom,msm-ext-disp-audio-codec-rx";
      };
    };

  - |
    sde_dp: qcom,dp_display@0 {
      cell-index = <0>;
      compatible = "qcom,dp-display";

      qcom,dp-aux-switch = <&fsa4480>;
      qcom,ext-disp = <&ext_disp>;
      qcom,altmode-dev = <&altmode 0>;
      usb-controller = <&usb0>;

      reg =   <0xae90000 0x0dc>,
              <0xae90200 0x0c0>,
              <0xae90400 0x508>,
              <0xae91000 0x094>,
              <0x88eaa00 0x200>,
              <0x88ea200 0x200>,
              <0x88ea600 0x200>,
              <0xaf02000 0x1a0>,
              <0x88ea000 0x200>,
              <0x88e8000 0x20>,
              <0x0aee1000 0x034>,
              <0xae91400 0x094>,
              <0xaf03000 0x8>;
      reg-names = "dp_ahb", "dp_aux", "dp_link",
                  "dp_p0", "dp_phy", "dp_ln_tx0", "dp_ln_tx1",
                  "dp_mmss_cc", "dp_pll", "usb3_dp_com",
                  "hdcp_physical", "dp_p1", "gdsc";

      interrupt-parent = <&mdss_mdp>;
      interrupts = <12 0>;

      #clock-cells = <1>;
      clocks =  <&clock_dispcc DISP_CC_MDSS_DP_AUX_CLK>,
                <&clock_rpmh RPMH_CXO_CLK>,
                <&clock_gcc GCC_USB3_PRIM_PHY_PIPE_CLK>,
                <&clock_dispcc DISP_CC_MDSS_DP_LINK_CLK>,
                <&clock_dispcc DISP_CC_MDSS_DP_LINK_CLK_SRC>,
                <&clock_dispcc DISP_CC_MDSS_DP_LINK_INTF_CLK>,
                <&clock_dispcc DISP_CC_MDSS_DP_PIXEL_CLK_SRC>,
                <&sde_dp DP_PHY_PLL_VCO_DIV_CLK>,
                <&clock_dispcc DISP_CC_MDSS_DP_PIXEL1_CLK_SRC>,
                <&clock_dispcc DISP_CC_MDSS_DP_PIXEL_CLK>,
                <&clock_dispcc DISP_CC_MDSS_DP_PIXEL1_CLK>;
      clock-names = "core_aux_clk", "core_usb_ref_clk_src",
                "core_usb_pipe_clk", "link_clk", "link_clk_src",
                "link_iface_clk", "pixel_clk_rcg", "pixel_parent",
                "pixel1_clk_rcg", "strm0_pixel_clk", "strm1_pixel_clk";
      clock-mmrm = <0 0 0 0 DISP_CC_MDSS_DP_LINK_CLK_SRC 0 0 0 0 0 0>;

      qcom,pll-revision = "5nm-v1";
      qcom,phy-version = <0x420>;
      qcom,dp-aux-switch = <&fsa4480>;

      qcom,aux-cfg0-settings = [1c 00];
      qcom,aux-cfg1-settings = [20 13 23 1d];
      qcom,aux-cfg2-settings = [24 00];
      qcom,aux-cfg3-settings = [28 00];
      qcom,aux-cfg4-settings = [2c 0a];
      qcom,aux-cfg5-settings = [30 26];
      qcom,aux-cfg6-settings = [34 0a];
      qcom,aux-cfg7-settings = [38 03];
      qcom,aux-cfg8-settings = [3c bb];
      qcom,aux-cfg9-settings = [40 03];
      qcom,max-pclk-frequency-khz = <593470>;
      qcom,mst-enable;
      qcom,dsc-feature-enable;
      qcom,fec-feature-enable;
      qcom,dsc-continuous-pps;
      qcom,qos-cpu-mask = <0xf>;
      qcom,qos-cpu-latency-us = <300>;
      vdda-1p2-supply = <&L6B>;
      vdda-0p9-supply = <&L1B>;
      vdd_mx-supply = <&VDD_MXA_LEVEL>;

      qcom,hbr-rbr-voltage-swing = <0x07 0x0f 0x16 0x1f>,
                <0x11 0x1e 0x1f 0xff>,
                <0x16 0x1f 0xff 0xff>,
                <0x1f 0xff 0xff 0xff>;
      qcom,hbr-rbr-pre-emphasis = <0x00 0x0d 0x14 0x1a>,
                <0x00 0x0e 0x15 0xff>,
                <0x00 0x0e 0xff 0xff>,
                <0x02 0xff 0xff 0xff>;

      qcom,hbr2-3-voltage-swing = <0x02 0x12 0x16 0x1a>,
                <0x09 0x19 0x1f 0xff>,
                <0x10 0x1f 0xff 0xff>,
                <0x1f 0xff 0xff 0xff>;
      qcom,hbr2-3-pre-emphasis = <0x00 0x0c 0x15 0x1b>,
                <0x02 0x0e 0x16 0xff>,
                <0x02 0x11 0xff 0xff>,
                <0x04 0xff 0xff 0xff>;

      qcom,ctrl-supply-entries {
      #address-cells = <1>;
      #size-cells = <0>;

        qcom,ctrl-supply-entry@0 {
          reg = <0>;
          qcom,supply-name = "vdda-1p2";
          qcom,supply-min-voltage = <1200000>;
          qcom,supply-max-voltage = <1200000>;
          qcom,supply-enable-load = <21700>;
          qcom,supply-disable-load = <0>;
        };
      };

      qcom,phy-supply-entries {
        #address-cells = <1>;
        #size-cells = <0>;

        qcom,phy-supply-entry@0 {
          reg = <0>;
          qcom,supply-name = "vdda-0p9";
          qcom,supply-min-voltage = <912000>;
          qcom,supply-max-voltage = <912000>;
          qcom,supply-enable-load = <115000>;
          qcom,supply-disable-load = <0>;
        };
      };

      qcom,core-supply-entries {
        #address-cells = <1>;
        #size-cells = <0>;

        qcom,core-supply-entry@0 {
          reg = <0>;
          qcom,supply-name = "refgen";
          qcom,supply-min-voltage = <0>;
          qcom,supply-max-voltage = <0>;
          qcom,supply-enable-load = <0>;
          qcom,supply-disable-load = <0>;
        };
      };

      qcom,pll-supply-entries {
        #address-cells = <1>;
        #size-cells = <0>;

        qcom,pll-supply-entry@0 {
          reg = <0>;
          qcom,supply-name = "vdd_mx";
          qcom,supply-min-voltage =
                 <RPMH_REGULATOR_LEVEL_TURBO>;
          qcom,supply-max-voltage =
                 <RPMH_REGULATOR_LEVEL_MAX>;
          qcom,supply-enable-load = <0>;
          qcom,supply-disable-load = <0>;
        };
      };
    };
...