// SPDX-License-Identifier: BSD-3-Clause
/*
 * Copyright (c) 2023-2024 Qualcomm Innovation Center, Inc. All rights reserved.
 */

#include <dt-bindings/interrupt-controller/arm-gic.h>

&soc {
	msm_hw_fence: qcom,hw-fence {
		compatible = "qcom,msm-hw-fence";
		status = "ok";

		/* SOCCP properties */
		interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-controller;
		#interrupt-cells = <1>;
		iommus = <&apps_smmu 0x562 0x1>;
		dma-coherent;
		soccp_controller = <&soccp_pas>;

		qcom,hw-fence-table-entries = <8192>;
		qcom,hw-fence-queue-entries = <800>;
		qcom,ipcc-reg = <0x400000 0x140000>;

		/* time register */
		qcom,qtime-reg = <0xC221000 0x1000>;

		/* ipc version */
		qcom,hw-fence-ipc-ver = <0x20A02>;

		/* base client queue properties */
		qcom,hw-fence-client-type-dpu = <6 2 128 1>;
		qcom,hw-fence-client-type-ipe = <1 2 800 0>;
		qcom,hw-fence-client-type-vpu = <1 2 800 0>;
		qcom,hw-fence-client-type-ife0 = <1 1 128 1>;

		/* extra client queue properties */
		qcom,hw-fence-client-type-ife0-extra = <20 28 1 1>;

		/* haven io-mem specific */
		hw_fence@1 {
			compatible = "qcom,msm-hw-fence-mem";
			qcom,master;
			shared-buffer = <&hwfence_shbuf>;
		};
	};
};