Update the reserve gpios for Sun SoC as these
are not going to be used by linux and accessing
them by default can result in XPU fault.
Change-Id: I0c95d3df1f91584a77956f0beffebf1b63141c9f
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
Support the memshare device, which requires 6 Mb.
Change-Id: I1d72bdf7cdb895fbe76e49ad3541fa715bddf24d
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
Enable apss cpu ncc0, ncc1 measure nodes to support cluster l, m
clk measure.
Change-Id: Ib691fb4254f41c64639e8f2e36c0d009336576c3
Signed-off-by: Vivek Aknurwar <quic_viveka@quicinc.com>
Add memshare nodes for client ids 5 and 6 which will be used for the
qmc use case. One of these nodes will allocate memory from a reserved
memory range while the other allocates from system cma.
Change-Id: I9deda5ba526c9d7e44e639fd97ca0825a1de357f
Signed-off-by: Tony Truong <quic_truong@quicinc.com>
Add a dependency between the gh-watchdog and pmic-pon-log devices
for Sun boards. This ensures that during system boot-up, the driver
responsible for the gh-watchdog device initializes before the one
responsible for the pmic-pon-log device.
This behavior is critical to ensuring that a PMIC warm-reset correctly
occurs in the situation that the qcom,pmic-fault-panic property is
specified for the pmic-pon-log device and the previous system
power-off was caused by a PMIC fault.
Change-Id: I8c40b19ce150ca5bb3cb9514c7d293481a5009af
Signed-off-by: David Collins <quic_collinsd@quicinc.com>
Update llcc gold bwmon name to correctly distinguish
its base address.
Change-Id: Id8c431e4093894c719731e88cd807b9a30de7559
Signed-off-by: Amir Vajid <quic_avajid@quicinc.com>
Update disp_rsc device to use correct 0x1000 size instead of 0x10000
for sun.
Change-Id: I81607aaf202ff18032fa117dfbb6f47f4e4ebb40
Signed-off-by: Rashid Zafar <quic_rzafar@quicinc.com>
Add qcedev crypto support for sun platforms.
Change-Id: Id558a7d0620afa40c8d9b8e43161d8f6ca09e810
Signed-off-by: Daniel Perez-Zoghbi <quic_dperezzo@quicinc.com>
Provide a contiguous region for use by qmc. Unless explicitly
instructed, this region should not be used by external customers.
Change-Id: I98f651c835cf7fa19eba2bc209eb7b7807245877
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
This reverts commit 704e2e0186.
Reason for revert: No longer needed once 1ns frequency is disabled.
Change-Id: I2355fff08acf5746efdce7562df99f83bba4696b
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
EUD node was set to bypass the pdc since the pdc node was unavailable.
Now that it's available, set the interrupt parent to the pdc and adjust
the EUD node accordingly.
Change-Id: I2516315753a3452d66b9cad3e6bdc089bb8dcd6c
Signed-off-by: Melody Olvera <quic_molvera@quicinc.com>
The qcom,display heap is used for camera usecases.
Change-Id: Ib937670c33284fb2dc624258fd8e5978b4405ace
Signed-off-by: Vijay Kumar Tumati <vtumati@quicinc.com>
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
Add devicetree soccp node for Sun SoC. In addition to existing smp2p INT's
SOCCP H/W needs 2 more INT for controlling the power state of the H/W.
sleep bit and wakeup bit on master kernel corresponds to these INT.
Change-Id: I00d2f6a3fb76f306fa070df87f22bb2d07cb4c3b
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
This reverts commit 0d05778dbb.
Enable UFS LPM support.
Change-Id: I6e65310ad1ca98fc20fc148dac3f342375638841
Signed-off-by: Bao D. Nguyen <quic_nguyenb@quicinc.com>
Use 0x17 pmu event as miss-ev in llcc memlat for sun.
Change-Id: Ifbd710d9fcb24f7442f2b6d6d8e94f858e48c326
Signed-off-by: Amir Vajid <quic_avajid@quicinc.com>
Enable low power modes for sun through kernel command
line parameters.
Change-Id: Ifd4b8fcce8d6b2c0b4f6a4c2dcb088ae8c8fa661
Signed-off-by: Rashid Zafar <quic_rzafar@quicinc.com>
Common DT format for sd card changes across targets.
Change-Id: I6d3fc5141ed8e73882dcf0f95706501b8208164b
Signed-off-by: Ziqi Chen <quic_ziqichen@quicinc.com>
