songchai
d361af32c9
Revert "ARM: dts: msm: add dcc registers into dt for tuna"
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This reverts commit f3fae6c2e9
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Change-Id: I59abb9129af619bec885cd2d52110070524b229d
Signed-off-by: songchai <quic_songchai@quicinc.com >
2025-02-28 16:32:00 +08:00
songchai
ec805f5b8b
ARM: dts: msm: Reserve 24kb to dcc on TZ for tuna
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Reserve 24kb to dcc on TZ while HLOS have 8 KB.
Change-Id: Ic30e6c0c32d6994e495091b4bddfa07e55c36285
Signed-off-by: songchai <quic_songchai@quicinc.com >
2025-02-17 23:09:34 +05:30
songchai
f3fae6c2e9
ARM: dts: msm: add dcc registers into dt for tuna
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add dcc registers into dt for tuna.
Change-Id: Iba0d519b794ff6337c4045c00626fe7c1fc511a9
Signed-off-by: songchai <quic_songchai@quicinc.com >
2025-01-07 22:41:06 -08:00
songchai
ece4aeb32c
ARM: dts: msm: Reserve 32kb to dcc on HLOS
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Reserve 32kb to dcc on HLOS.
Change-Id: Ib13b11a8e06792e721bdd95405ae99763c43dad1
Signed-off-by: songchai <quic_songchai@quicinc.com >
2024-11-26 17:19:31 +08:00
songchai
275cefb5be
ARM: dts: msm: add memory dump entry for tuna
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Add memory dump entry for tuna to collect dump data.
Change-Id: I53bd8e4b2d4ae180eff5b8f8dd46010901b7f401
Signed-off-by: songchai <quic_songchai@quicinc.com >
2024-09-18 18:04:15 +08:00