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Author SHA1 Message Date
QCTECMDR Service
2d4f9dc466 Merge "ARM: dts: msm: Update QoS for tuna SDC2" 2025-01-28 21:56:35 -08:00
Shivendra Pratap
07d3ff5e66 ARM: dts: qcom: Add interconnect-names in rproc cdsp node for tuna 
Add interconnect-names in remoteproc cdsp node for tuna.

Change-Id: I4551479bc259584728a681962e1a67f32daba29b
Signed-off-by: Shivendra Pratap <quic_spratap@quicinc.com>
 2025-01-27 15:48:02 +05:30
QCTECMDR Service
d6033aac0a Merge "ARM: dts: msm: Add fps entry for kera" 2025-01-24 13:29:51 -08:00
Manish Pandey
5d6949eaf0 ARM: dts: msm: Update QoS for tuna SDC2 
Update tuna SDC QoS cpu mask.

Change-Id: I6f925e294ef0e8511f24339e256aafcd3f2fe32d
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
 2025-01-24 19:34:51 +05:30
Paras Sharma
1447a58e8d ARM: dts: msm: PCIe CESTA related dt properties for tuna 
PCIe CESTA related dt properties for tuna.

Change-Id: I4bb53ed6378bb6f02600ec8d6109788a2bc84312
Signed-off-by: Paras Sharma <quic_parass@quicinc.com>
 2025-01-24 11:02:52 +05:30
QCTECMDR Service
d81e0bbc55 Merge "ARM: dts: qcom: Update gpu mitigation level and BCL threshold for tuna" 2025-01-23 17:04:19 -08:00
QCTECMDR Service
bbeca0cca0 Merge "ARM: dts: msm: Add support for dispcc_mx clock controller node" 2025-01-23 11:57:37 -08:00
QCTECMDR Service
7f872ad106 Merge "ARM: dts: msm: Update S1B/S2B/S3B min voltages for tuna" 2025-01-23 11:57:37 -08:00
Priyansh Jain
fdf5b9c6bd ARM: dts: qcom: Update gpu mitigation level and BCL threshold for tuna 
Update gpu mitigation level for tuna and BCL threshold based on latest
recommendation.

Change-Id: I51e9e60d6439439ce76fa4cfbdf7e4d909ef727e
Signed-off-by: Priyansh Jain <quic_priyjain@quicinc.com>
 2025-01-23 18:39:45 +05:30
QCTECMDR Service
f928797cf4 Merge "ARM: dts: msm: Fix the protected clocks for gcc" 2025-01-23 02:31:49 -08:00
Rui Chen
a04cc4f29b ARM: dts: msm: add trusted touch properties for kera qrd 
Add trusted touch properties for kera qrd platforms.

Change-Id: I6f6c65fcaa5300850c543ebe708b00a005a0a40f
Signed-off-by: Rui Chen <quic_ruc@quicinc.com>
 2025-01-23 16:32:57 +08:00
Sanskar Omar
4b87355d27 ARM: dts: msm: Add fps entry for kera 
Add fps entry for kera.

Change-Id: I04ff258f3d36345f9c618a3745253371a9e49420
Signed-off-by: Sanskar Omar <quic_sansomar@quicinc.com>
 2025-01-23 11:28:21 +05:30
Prem Sai Grandhi
425ccfd29a ARM: dts: msm: SLC SCID Heuristics support for tuna 
Enables HEURISTICS SCID for tuna.

Change-Id: Ie88346943ba30dbcdab502b56d20614a3f296118
Signed-off-by: Prem Sai Grandhi <quic_grandhir@quicinc.com>
 2025-01-23 10:35:53 +05:30
QCTECMDR Service
1732034de5 Merge "ARM: dts: msm: Add support for guest-cpus" 2025-01-22 14:29:26 -08:00
QCTECMDR Service
66f8f0575a Merge "ARM: dts: msm: add ddr-lpi qmi for tuna" 2025-01-22 14:29:26 -08:00
QCTECMDR Service
05e73a6fbc Merge "ARM: dts: msm: add goodix touch driver device nodes for tuna" 2025-01-22 06:04:57 -08:00
QCTECMDR Service
8bea7c54dc Merge "ARM: dts: qcom: Enable qup3 for mtp" 2025-01-22 01:45:04 -08:00
QCTECMDR Service
403a6fb604 Merge "ARM: dts: msm: Update qfprom node in kera for speed bin and gaming fuse" 2025-01-21 21:45:26 -08:00
QCTECMDR Service
52aa48ee75 Merge "ARM: dts: msm: Enable idle states for tuna VMs" 2025-01-21 04:11:01 -08:00
QCTECMDR Service
cd5e65553a Merge "ARM: dts: msm: Update cpucp regions for tuna" 2025-01-21 04:11:00 -08:00
QCTECMDR Service
b3ad11eb0e Merge "ARM: dts: qcom: Enable UFS MCQ on Kera platforms" 2025-01-21 04:11:00 -08:00
QCTECMDR Service
b20688629e Merge "ARM: dts: msm: add dcc registers into dt for tuna" 2025-01-21 04:11:00 -08:00
Anaadi Mishra
e2226e200c ARM: dts: msm: Fix the protected clocks for gcc 
Fix the clock handle entries in the protected clocks for gcc on Kera.

Change-Id: I0f7f633b0961fa2dda952fb9b53824aa45968595
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
 2025-01-21 16:30:26 +05:30
Abhinav Saurabh
c301ec7df2 ARM: dts: msm: add goodix touch driver device nodes for tuna 
Add goodix touch driver device nodes on tuna for CDP.

Change-Id: I6f4bbfdf8848bf823e6937404c354dce6814e80f
Signed-off-by: Abhinav Saurabh <quic_abhisaur@quicinc.com>
 2025-01-21 15:56:39 +05:30
songchai
e0754fd7fb ARM: dts: msm: add ddr-lpi qmi for tuna 
add ddr-lpi qmi for tuna.

Change-Id: I920f472840195bc6636732eb511abb2e2fbc21c4
Signed-off-by: songchai <quic_songchai@quicinc.com>
 2025-01-20 18:25:20 -08:00
Ravulapati Vishnu Vardhan Rao
61235b8386 ARM: dts: qcom: Enable qup3 for mtp 
Enable qup3 for MTP for Kera.
Enable wcd_usbss on MTP.

Change-Id: I84a9747a14cdc8931f37edf5910f318b23ba1d19
Signed-off-by: Ravulapati Vishnu Vardhan Rao <quic_visr@quicinc.com>
 2025-01-20 22:42:33 +05:30
QCTECMDR Service
0b3c89dfe5 Merge "ARM: dts: qcom: Update passive polling delay for tuna and kera thermalzones" 2025-01-19 22:13:07 -08:00
Vijayanand Jitta
4c35a7013a ARM: dts: msm: Update cpucp regions for tuna 
Update cpucp regions for tuna, inline with v2.
This removes pdp region and reduces cpucp_scandump
region to 1.5MB.

Change-Id: I571d8012545c7c547f0115d86e10183964fe7d8f
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
 2025-01-19 20:47:29 -08:00
QCTECMDR Service
24ce03fc99 Merge "ARM: dts: msm: Add llcc perfmon node for kera SOC" 2025-01-19 11:15:43 -08:00
QCTECMDR Service
a195b36574 Merge "ARM: dts: msm: Add glink probe entry for Kera" 2025-01-19 11:15:43 -08:00
QCTECMDR Service
9cb3c12c58 Merge "ARM: dts: msm: Update init mode as LPM for L2G for tuna" 2025-01-18 00:38:39 -08:00
QCTECMDR Service
e6be7f713b Merge "ARM: dts: msm: Update init mode as LPM for L11B for kera" 2025-01-18 00:38:39 -08:00
QCTECMDR Service
d21e532ad4 Merge "ARM: dts: qcom: remove unused gpio" 2025-01-17 05:51:50 -08:00
QCTECMDR Service
6730aa74e9 Merge "Revert "ARM: dts: msm: Disable mem-offline node"" 2025-01-17 05:51:50 -08:00
QCTECMDR Service
6342477f1b Merge "ARM: dts: msm: add trusted touch properties for tuna qrd" 2025-01-17 05:51:50 -08:00
QCTECMDR Service
308c679729 Merge "Revert "ARM: dts: msm: Disable mem-offline node"" 2025-01-17 05:51:50 -08:00
Kavya Nunna
a12606e007 ARM: dts: msm: Update init mode as LPM for L2G for tuna 
Update init mode as LPM , as L2G is kept always-on
if client is not available during boot in sleep state NPM
is voted because of init vote, update init mode to LPM.

Change-Id: I929be465451d0968cea75d486071b8593470ae9e
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>
 2025-01-17 02:07:20 -08:00
Kavya Nunna
280a4588dc ARM: dts: msm: Update init mode as LPM for L11B for kera 
update init mode as LPM , as L11B is kept always-on
if client is not available during boot in sleep state NPM is voted
because of init vote, update init mode to LPM.

Change-Id: I6e3602106970db24ca3166ded7176791515f7901
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>
 2025-01-17 02:06:50 -08:00
Kaushal Sanadhya
4b3299d726 ARM: dts: msm: Update qfprom node in kera for speed bin and gaming fuse 
Define speed bin and gaming fuse in qfprom node for kera gpu.

Change-Id: Ic0dd6e1c5c3c753cccc44aa25c3c56e340c675fb
Signed-off-by: Kaushal Sanadhya <quic_ksanadhy@quicinc.com>
 2025-01-16 23:41:53 -08:00
Pranav Mahesh Phansalkar
750a2cdf68 ARM: dts: msm: Add glink probe entry for Kera 
Add glink probe driver entry for Kera to have a way for
glink core to get pm notifications during apps suspend/resume.

Change-Id: I4c3a41dfb1bcb9e28ecad040c616b563be0b5e40
Signed-off-by: Pranav Mahesh Phansalkar <quic_pphansal@quicinc.com>
 2025-01-17 12:46:32 +05:30
Sneh Mankad
d5211a259f ARM: dts: msm: Add PDC as wakeup parent to TLMM for sdxkova 
Add PDC interrupt controller as wakeup-parent to enable
TLMM interrupts to wake up the SoC.

Change-Id: I3b75f257153ffbc4cac6d58f2f57bdb70cf07913
Signed-off-by: Sneh Mankad <quic_smankad@quicinc.com>
 2025-01-16 22:09:50 -08:00
Manish Pandey
8edd785e2f ARM: dts: qcom: Enable UFS MCQ on Kera platforms 
Enable the UFS MCQ feature on the Kera platforms.

Change-Id: I3e6349010c442666bef9a7b7c24dcd22e9d717b4
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
 2025-01-16 21:50:00 -08:00
Raviteja Laggyshetty
8b80d83de7 ARM: dts: msm: Add pcie and display voter devices for KERA 
Add pcie and display CRM voters for kera.
This will allow interconnect providers to target their
votes on CESTA DRV for meeting cesta client bandwidth constraints.

Change-Id: I16198f67ca4a8f7b2d3704044704b78bd267e2f3
Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
 2025-01-17 07:58:03 +05:30
Prem Sai Grandhi
d310a15384 ARM: dts: msm: Add llcc perfmon node for kera SOC 
Add llcc perfmon entry, qdss clock node to
llcc perfmon driver and aoss_qmp headers.

Change-Id: I34d57d4ab8ccb161a48ff7a89110ef67107d37a2
Signed-off-by: Prem Sai Grandhi <quic_grandhir@quicinc.com>
 2025-01-16 17:53:36 +05:30
Rui Chen
d6e45df54a ARM: dts: msm: add trusted touch properties for tuna qrd 
Add trusted touch properties for tuna qrd platforms.

Change-Id: I79fdebd3543b381bb8174a39b402b6faacd04816
Signed-off-by: Rui Chen <quic_ruc@quicinc.com>
 2025-01-16 00:03:12 -08:00
Sushrut Shree Trivedi
acfa9db83b ARM: dts: msm: Enable PCIe1 for kera 
This change adds PCIe1 node for kera.

Change-Id: I5c5b0b2a1a1654b187b7bcfe031602f6786efb4f
Signed-off-by: Sushrut Shree Trivedi <quic_sushruts@quicinc.com>
 2025-01-16 11:39:27 +05:30
QCTECMDR Service
9f7ab320ae Merge "ARM: dts: msm: Add CRM devices for kera" 2025-01-15 21:51:26 -08:00
QCTECMDR Service
770aaa1d9b Merge "ARM: dts: msm: Update Reference Clock to clk8_a4 for Kera UFS 2.x" 2025-01-15 21:51:26 -08:00
Aman Kanwar
c5e6726dbe ARM: dts: msm: Add SLC MPAM nodes for kera 
Add support for SLC MPAM. Enables support for
CPU, GPU SLC partitioning and monitoring current
capacity and read miss monitors.

Change-Id: I97d3cdafcf8c1c08733d0efc5902e72bb7a7fa91
Signed-off-by: Aman Kanwar <quic_akanwar@quicinc.com>
 2025-01-16 01:58:56 +05:30
QCTECMDR Service
65f07a3379 Merge "ARM: dts: msm: Add MPAM,NOC BW MPAM node for Kera" 2025-01-15 05:05:05 -08:00