4 Commits

Author	SHA1	Message	Date
Jinfeng Gu	5560b268c7	ARM: dts: msm: update clock rate for csot panel 10 bits cmd panel ... Increased clock rate with 2% config for 10 bits dphy cmd panel due to transfer time go beyond cause frame-drop with cesta enabled. Change-Id: I30fed53879bcf04ade37ff737b27c87f82740c67 Signed-off-by: Jinfeng Gu <quic_gjinfeng@quicinc.com>	2024-08-15 23:21:47 -07:00
Qing Huang	6d718caa81	ARM: dts: msm: add HDR capability for panels on sun target ... Change adds HDR capability for panels on sun target Change-Id: I2e4dc6e037c3dc465103ee9c1c4465be7173c841 Signed-off-by: Qing Huang <quic_huangq@quicinc.com>	2024-07-22 22:23:36 -07:00
Jinfeng Gu	fddd02548e	ARM: dts: msm: add the identification of rc_override_v1 ... This change adds the identification of rc_override_v1 and remove 24/20Hz for wqhd command dphy mode due to panel limitation. Change-Id: I6ec180fa5ffe25ca914ecd270bbe55c3a64e14d8 Signed-off-by: Jinfeng Gu <quic_gjinfeng@quicinc.com>	2024-06-18 17:47:41 +08:00
Jinfeng Gu	39f6c30dc4	ARM: dts: msm: add NT37801 10 bits cmd mode panel support ... This change add NT37801 10 bits cmd mode panel support. Change-Id: I0e5472ea28b0e7e1725194d8b23e67b6c79509b5 Signed-off-by: Jinfeng Gu <quic_gjinfeng@quicinc.com>	2024-03-02 22:18:20 +08:00