Commit Graph

3769 Commits

Author SHA1 Message Date
QCTECMDR Service
88460cd362 Merge "ARM: dts: msm: Update initial DCVS devices for Kera" 2025-02-05 17:55:16 -08:00
Manish Pandey
df7caa4483 ARM: dts: qcom: Update ESI affinity mask for tuna
Update ESI affinity mask in tuna device tree for UFS
performance reasons.

Change-Id: Ie06355e2d2604553da0f1e72b6d46032c55cdcf4
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
2025-02-05 16:32:24 +05:30
Anaadi Mishra
8d5d093c90 ARM: dts: msm: Update the tuna gcc and display clock controller nodes
Update the gcc and display clock controllers removing the tuna 1.0 to
align with the latest clock plan updates for Tuna.

Change-Id: Ib8e9245fc2c1ca90ad3cf8ad614bbe3061bafaeb
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
2025-02-04 21:18:20 -08:00
QCTECMDR Service
6086f3584a Merge "ARM: dts: msm: Remove some ocp-notifier supplies from sun HDK platforms" 2025-02-04 06:19:01 -08:00
QCTECMDR Service
5a8b2807b5 Merge "ARM: dts: msm: Add mode thresholds for S2B for tuna" 2025-02-03 22:02:46 -08:00
Fenglin Wu
66e7d8554b ARM: dts: msm: Remove some ocp-notifier supplies from sun HDK platforms
Sun HDK platform is expected to work without the GNSS board (which also
holds PMR735D) being attached.  If the board is not attached,
regulator-ocp-notifier probe may fail as it references some regulators
on PMR735D which do not get probed.

Remove those regulator references from regulator-ocp-notifier as they
are not strictly necessary under it.

Change-Id: Ie6f35a9c6142fe54d7191f9a392074f2e39b2bee
Signed-off-by: Fenglin Wu <quic_fenglinw@quicinc.com>
2025-02-03 22:01:35 -08:00
Prem Sai Grandhi
3cb12fe034 ARM: dts: msm: SLC SCID Heuristics support for tuna
Enables HEURISTICS SCID for tuna.

Change-Id: Ie88346943ba30dbcdab502b56d20614a3f296118
Signed-off-by: Prem Sai Grandhi <quic_grandhir@quicinc.com>
2025-02-03 07:03:41 -08:00
QCTECMDR Service
cd65ec2420 Merge "ARM: dts: msm: SLC SCID Heuristics support for tuna" 2025-02-03 04:51:01 -08:00
Kavya Nunna
2c23f45466 ARM: dts: msm: Add mode thresholds for S2B for tuna
Add mode voting support for S2B for tuna platforms.
Update the retention threshold to 50ma as per the HW
recommendations.

UFS needs to do mode vote on vccq parent, add mode vote
for S2B for tuna.

Change-Id: I3101f3f1fb0255bdee94d4b854f7b8c73186a035
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>
2025-02-03 17:45:29 +05:30
kraparthy
b9921d7ce0 ARM: dts: msm: update reserved memory for tuna
Change-Id: Ib8f4226eaec3f60d2a58f27e35a6f488713dd3e9
Signed-off-by: kraparthy <quic_kraparth@quicinc.com>
2025-02-02 21:13:36 -08:00
Linux Build Service Account
232b3dcad8 Merge "ARM: dts: msm: PCIe CESTA related dt properties for tuna" into kernel.lnx.6.6.r1-rel 2025-01-31 23:05:48 -08:00
Linux Build Service Account
78e3850a96 Merge changes I5b210ac3,I16198f67,I04ff258f into kernel.lnx.6.6.r1-rel
* changes:
  ARM: dts: msm: Update regulator support for tuna
  ARM: dts: msm: Add pcie and display voter devices for KERA
  ARM: dts: msm: Add fps entry for kera
2025-01-31 22:35:57 -08:00
Linux Build Service Account
98b9f0da64 Merge "ARM: dts: qcom: Update gpu mitigation level and BCL threshold for tuna" into kernel.lnx.6.6.r1-rel 2025-01-31 22:35:56 -08:00
Paras Sharma
a532935af1 ARM: dts: msm: PCIe CESTA related dt properties for tuna
PCIe CESTA related dt properties for tuna.

Change-Id: I4bb53ed6378bb6f02600ec8d6109788a2bc84312
Signed-off-by: Paras Sharma <quic_parass@quicinc.com>
2025-02-01 11:29:57 +05:30
Kavya Nunna
e3fe7b6fe7 ARM: dts: msm: Update regulator support for tuna
Add RET mode support for L2G/L3G for tuna platforms as per
the sleep setting recommendation.

While at it set init mode as LPM for L3G and L6K
regulators. As clients always vote for 0 load, the
regulator framework will not apply it and the HPM
init-mode will not change, leading to higher power
consumption. So update the LPM for L3G and L6K regulators.

Change-Id: I5b210ac3e9ffee94889c2390becfaa5eb6c235ab
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>
2025-02-01 11:29:50 +05:30
Raviteja Laggyshetty
379051569e ARM: dts: msm: Add pcie and display voter devices for KERA
Add pcie and display CRM voters for kera.
This will allow interconnect providers to target their
votes on CESTA DRV for meeting cesta client bandwidth constraints.

Change-Id: I16198f67ca4a8f7b2d3704044704b78bd267e2f3
Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
2025-02-01 11:29:42 +05:30
Sanskar Omar
48829df0fe ARM: dts: msm: Add fps entry for kera
Add fps entry for kera.

Change-Id: I04ff258f3d36345f9c618a3745253371a9e49420
Signed-off-by: Sanskar Omar <quic_sansomar@quicinc.com>
2025-02-01 11:29:33 +05:30
Priyansh Jain
f0a5ef78fb ARM: dts: qcom: Update gpu mitigation level and BCL threshold for tuna
Update gpu mitigation level for tuna and BCL threshold based on latest
recommendation.

Change-Id: I51e9e60d6439439ce76fa4cfbdf7e4d909ef727e
Signed-off-by: Priyansh Jain <quic_priyjain@quicinc.com>
2025-02-01 11:29:26 +05:30
Kaushal Sanadhya
2adc25df04 ARM: dts: msm: Update qfprom node in kera for speed bin and gaming fuse
Define speed bin and gaming fuse in qfprom node for kera gpu.

Change-Id: Ic0dd6e1c5c3c753cccc44aa25c3c56e340c675fb
Signed-off-by: Kaushal Sanadhya <quic_ksanadhy@quicinc.com>
2025-02-01 11:29:19 +05:30
Vijayanand Jitta
07b4eef32e ARM: dts: msm: Update cpucp regions for tuna
Update cpucp regions for tuna, inline with v2.
This removes pdp region and reduces cpucp_scandump
region to 1.5MB.

Change-Id: I571d8012545c7c547f0115d86e10183964fe7d8f
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
2025-02-01 11:29:11 +05:30
QCTECMDR Service
f6652a0da3 Merge "ARM: dts: qcom: Correct gpio pins for i2s0_sd0" 2025-01-31 15:33:45 -08:00
QCTECMDR Service
c7e57432fe Merge "ARM: dts: msm: Update regulator support for tuna" 2025-01-31 15:33:45 -08:00
Kavya Nunna
47a0cb5019 ARM: dts: msm: Update regulator support for tuna
Add RET mode support for L2G/L3G for tuna platforms as per
the sleep setting recommendation.

While at it set init mode as LPM for L3G and L6K
regulators. As clients always vote for 0 load, the
regulator framework will not apply it and the HPM
init-mode will not change, leading to higher power
consumption. So update the LPM for L3G and L6K regulators.

Change-Id: I5b210ac3e9ffee94889c2390becfaa5eb6c235ab
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>
2025-01-31 01:45:37 -08:00
Sayantan Chakraborty
727537d061 ARM: dts: msm: Update initial DCVS devices for Kera
Update initial DCVS devices for Kera. This
includes frequency and memlat mapping tables.

Change-Id: Ie29a3e0d831fe308b9ee843aba34f6484f461933
Signed-off-by: Sayantan Chakraborty <quic_saycha@quicinc.com>
2025-01-31 15:07:20 +05:30
Ravulapati Vishnu Vardhan Rao
729d8161a7 ARM: dts: qcom: Correct gpio pins for i2s0_sd0
Update of correct gpio pin for i2s_ds0.

Change-Id: I6716bdd61c90909cbbc646638ea97d98ae5b50ba
Signed-off-by: Ravulapati Vishnu Vardhan Rao <quic_visr@quicinc.com>
2025-01-31 01:24:03 -08:00
QCTECMDR Service
aebcf7088a Merge "ARM: dts: msm: Enable external display on Kera" 2025-01-30 09:08:09 -08:00
QCTECMDR Service
c378c505c3 Merge "ARM: dts: msm: enable swr haptics dailinks in Kera" 2025-01-30 09:08:09 -08:00
Ravulapati Vishnu Vardhan Rao
900b5f59d4 ARM: dts: msm: enable swr haptics dailinks in Kera
Enable swr haptics dailink on Kera variants.
Even though kera does not support SWR haptics,
as there is no LRA connected, creating the haptics
dailink to run haptics usecase cleanly during
andorid vts tests.

Change-Id: Ia2415a69260612be03f0e26515f91074a156702d
Signed-off-by: Ravulapati Vishnu Vardhan Rao <quic_visr@quicinc.com>
2025-01-30 04:10:56 -08:00
QCTECMDR Service
0371405d3e Merge "ARM: dts: msm: Add pcie and display voter devices for KERA" 2025-01-30 02:49:56 -08:00
Kisan Yadav
540cde9334 ARM: dts: msm: Add haptics route for QRD
-Haptics route is not present in audio routing of qrd device tree and
 eventually ringtone haptics is not working.
-Add haptics routing and also update haptics codec name to swr-haptics.

Change-Id: Ie4078c410cf593edd990dd49020f6d0cde7c1a26
Signed-off-by: Kisan Yadav <quic_kisany@quicinc.com>
2025-01-30 02:00:31 -08:00
QCTECMDR Service
5aadf83b9d Merge "ARM: dts: qcom: Add interconnect-names in rproc cdsp node for tuna" 2025-01-28 21:56:35 -08:00
QCTECMDR Service
ed96070518 Merge "ARM: dts: msm: PCIe CESTA related dt properties for tuna" 2025-01-28 21:56:35 -08:00
QCTECMDR Service
2d4f9dc466 Merge "ARM: dts: msm: Update QoS for tuna SDC2" 2025-01-28 21:56:35 -08:00
Linux Build Service Account
908905530b Merge 0b3c89dfe5 on remote branch
Change-Id: If5c7c3d4a4849e440f837d77923616bf3a9b71a1
2025-01-28 11:30:06 -08:00
Linux Build Service Account
a8350fd860 Merge 166f67d8f4 on remote branch
Change-Id: Iefe4db131698b825ccb8f814607171e4a83b3c8f
2025-01-28 11:21:54 -08:00
Shivendra Pratap
07d3ff5e66 ARM: dts: qcom: Add interconnect-names in rproc cdsp node for tuna
Add interconnect-names in remoteproc cdsp node for tuna.

Change-Id: I4551479bc259584728a681962e1a67f32daba29b
Signed-off-by: Shivendra Pratap <quic_spratap@quicinc.com>
2025-01-27 15:48:02 +05:30
QCTECMDR Service
d6033aac0a Merge "ARM: dts: msm: Add fps entry for kera" 2025-01-24 13:29:51 -08:00
Manish Pandey
5d6949eaf0 ARM: dts: msm: Update QoS for tuna SDC2
Update tuna SDC QoS cpu mask.

Change-Id: I6f925e294ef0e8511f24339e256aafcd3f2fe32d
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
2025-01-24 19:34:51 +05:30
Saranya R
f7b91b6997 Revert "ARM: dts: msm: Add support for new WCN Card for Parrot VM"
This reverts commit 846159d0bd.

Change-Id: I0fddb463c5a5e7dbfa23ea9aaf28252ff03f926d
Signed-off-by: Saranya R <quic_sarar@quicinc.com>
2025-01-23 22:15:25 -08:00
Paras Sharma
1447a58e8d ARM: dts: msm: PCIe CESTA related dt properties for tuna
PCIe CESTA related dt properties for tuna.

Change-Id: I4bb53ed6378bb6f02600ec8d6109788a2bc84312
Signed-off-by: Paras Sharma <quic_parass@quicinc.com>
2025-01-24 11:02:52 +05:30
QCTECMDR Service
d81e0bbc55 Merge "ARM: dts: qcom: Update gpu mitigation level and BCL threshold for tuna" 2025-01-23 17:04:19 -08:00
QCTECMDR Service
bbeca0cca0 Merge "ARM: dts: msm: Add support for dispcc_mx clock controller node" 2025-01-23 11:57:37 -08:00
QCTECMDR Service
7f872ad106 Merge "ARM: dts: msm: Update S1B/S2B/S3B min voltages for tuna" 2025-01-23 11:57:37 -08:00
Linux Build Service Account
b87514069e Merge "ARM: dts: msm: Add support for guest-cpus" into kernel.lnx.6.6.r1-rel 2025-01-23 08:34:25 -08:00
Priyansh Jain
fdf5b9c6bd ARM: dts: qcom: Update gpu mitigation level and BCL threshold for tuna
Update gpu mitigation level for tuna and BCL threshold based on latest
recommendation.

Change-Id: I51e9e60d6439439ce76fa4cfbdf7e4d909ef727e
Signed-off-by: Priyansh Jain <quic_priyjain@quicinc.com>
2025-01-23 18:39:45 +05:30
QCTECMDR Service
f928797cf4 Merge "ARM: dts: msm: Fix the protected clocks for gcc" 2025-01-23 02:31:49 -08:00
Swetha Chikkaboraiah
67b2369061 ARM: dts: msm: Add support for guest-cpus
Add support for offlining CPUs during VM load for Parrot.

Change-Id: Id5dad4d40375942a2f8ad671345390ecfc7a3926
Signed-off-by: Swetha Chikkaboraiah <quic_schikk@quicinc.com>
(cherry picked from commit 07b61ddce6)
2025-01-23 15:45:07 +05:30
Rui Chen
a04cc4f29b ARM: dts: msm: add trusted touch properties for kera qrd
Add trusted touch properties for kera qrd platforms.

Change-Id: I6f6c65fcaa5300850c543ebe708b00a005a0a40f
Signed-off-by: Rui Chen <quic_ruc@quicinc.com>
2025-01-23 16:32:57 +08:00
Sanskar Omar
4b87355d27 ARM: dts: msm: Add fps entry for kera
Add fps entry for kera.

Change-Id: I04ff258f3d36345f9c618a3745253371a9e49420
Signed-off-by: Sanskar Omar <quic_sansomar@quicinc.com>
2025-01-23 11:28:21 +05:30
Prem Sai Grandhi
425ccfd29a ARM: dts: msm: SLC SCID Heuristics support for tuna
Enables HEURISTICS SCID for tuna.

Change-Id: Ie88346943ba30dbcdab502b56d20614a3f296118
Signed-off-by: Prem Sai Grandhi <quic_grandhir@quicinc.com>
2025-01-23 10:35:53 +05:30