Commit Graph

471 Commits

Author SHA1 Message Date
QCTECMDR Service
6e47aaccae Merge "ARM: dts: msm: sun: add interconnects for soccp rproc" 2024-08-21 13:47:41 -07:00
QCTECMDR Service
30a6c6b4d7 Merge "ARM: dts: msm: Add platform_mpam slc node for sun" 2024-08-17 09:52:09 -07:00
QCTECMDR Service
a4b731a3d6 Merge "ARM: dts: qcom: Add Nodes for SLC MPAM support" 2024-08-14 03:25:38 -07:00
Huang Yiwei
63d17b94ea ARM: dts: msm: Add platform_mpam slc node for sun
Add platform_mpam slc node for sun.

Change-Id: Iacf470e2a8ca60277a817a4f8d159b5c75b80bc6
Signed-off-by: Huang Yiwei <quic_hyiwei@quicinc.com>
2024-08-14 10:54:04 +08:00
Gokul krishna Krishnakumar
8791d1c355 ARM: dts: msm: sun: add interconnects for soccp rproc
APPS needs to place proxy votes to ddr and cnoc when the SOCCP is in D0.

Change-Id: Idfa93910b51c6df033ea010480c1a8adeacd4af5
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
2024-08-13 13:41:39 -07:00
Gokul krishna Krishnakumar
f7f2a9a731 ARM: dts: msm: sun: Add SOCCP_SOCCP_SPARE_REG0 to check SOCCP status
SOCCP_SOCCP_SPARE_REG0 is used to check D0 status of SOCCP.
TCSR_SOCCP_SLEEP_STATUS is used to check D3 status of SOCCP.

Change-Id: Icee37cddb0b7ef303962cab0d9a8f37a211a05da
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
2024-08-13 13:40:10 -07:00
QCTECMDR Service
a42a64bb1e Merge "ARM: dts: msm: Update SLC SCID Heuristics property" 2024-08-13 12:29:04 -07:00
Avinash Philip
12d8a87783 ARM: dts: qcom: Add Nodes for SLC MPAM support
Support for MPAM SLC support.

Change-Id: Id98cc9e2d346d536905d92d0ef15ecf90ca8d162
Signed-off-by: Avinash Philip <quic_avinashp@quicinc.com>
2024-08-13 06:46:01 +05:30
QCTECMDR Service
6932695c34 Merge "ARM: dts: msm: Remove cpusys_vm region on sun" 2024-08-12 14:14:24 -07:00
Avinash Philip
55be01b6fc ARM: dts: msm: Update SLC SCID Heuristics property
Update vendor prefix qcom for heuristics SCID property.

Change-Id: I9a683f6ac543a2a7108986abd68f21c1df8a54bb
Signed-off-by: Avinash Philip <quic_avinashp@quicinc.com>
2024-08-12 23:58:10 +05:30
Avinash Philip
b340945a35 ARM: dts: msm: SLC SCID Heuristics support for sun
Enables HEURISTICS SCID for sun.

Change-Id: I1f52aeb0000c5835236bf6c04cc3c51e87cdfedf
Signed-off-by: Avinash Philip <quic_avinashp@quicinc.com>
2024-08-09 14:56:28 +05:30
Maulik Shah
0455109209 ARM: dts: msm: Add sw drv3 of disp_crm for sun
SW drv3 may be used sometimes by display panel. Add it.

Change-Id: I03fc0bee08c44447caf689b747b054f4aa62ffca
Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
2024-08-06 01:38:51 -07:00
Patrick Daly
44d258db88 ARM: dts: msm: Remove cpusys_vm region on sun
This feature is not supported on sun, and its memory region is now
reused by hypervisor for other purposes.

Change-Id: I027335e4f8358bed7cb692120ca0ba0b601b472e
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
2024-08-05 16:27:37 -07:00
Gokul krishna Krishnakumar
5d91e5305c Revert "ARM: dts: qcom: Add ready ack to the list of soccp interrupts"
This reverts commit d7483f4aed.

Change-Id: Id54ae640c8ff967255ff9db68ccb509813fbcea4
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
2024-08-05 15:07:09 -07:00
QCTECMDR Service
1efaf82eaf Merge "ARM: dts: msm: Add shutdown ack for each remoteproc processors" 2024-07-31 02:21:33 -07:00
Maulik Shah
d139cd2e2d ARM: dts: msm: Remove unused SW DRVs for disp_crm device for sun
Remove unused SW DRVs as keeping them makes them register
with IRQs and leading to spurious IRQs.

Change-Id: Iba8723b7ac734286668158fe793bde97f3f31eda
Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
2024-07-30 03:01:37 -07:00
Mukesh Ojha
eb19dd58e0 ARM: dts: msm: Add shutdown ack for each remoteproc processors
legacy SoCs had shutdown ack only available to modem DSP
since waipio, it is even available for ADSP and CDSP and since
we are adding shutdown ack timeout which would wait for these
ack interrupts. Let's add them for ADSP and CDSP as well.

Change-Id: I75c427be29d8d762617ccc1e595929edb9ff2c3b
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
2024-07-29 14:37:44 +05:30
QCTECMDR Service
ecefde49d6 Merge "ARM: dts: msm: Map llcc gold bwmon as non-early for sun" 2024-07-25 21:43:50 -07:00
QCTECMDR Service
aeffe232df Merge "ARM: dts: msm: Add fast entry in sun" 2024-07-25 21:43:50 -07:00
Lingutla Chandrasekhar
6d5d8319b0 ARM: dts: msm: Add fast entry in sun
Add CPUCP fast device tree entry to get mailbox channel id and cpus to
be controlled with fast.

Change-Id: Ibfc2db806adf97985bf3921fac1244032749d61a
Signed-off-by: Lingutla Chandrasekhar <quic_lingutla@quicinc.com>
2024-07-23 23:40:53 -07:00
Mukesh Ojha
8e39e7601f ARM: dts: msm: Mention class cpus as cpu phandles for sun/pineapple
Remove the hard coded class cpus and replace them with their
phandles.

Change-Id: I283ac79d64d945e12477f61a67b058574bde7031
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
2024-07-22 22:40:36 -07:00
QCTECMDR Service
f4be45d558 Merge "ARM: dts: msm: Add glink probe entry for Sun" 2024-07-22 15:45:25 -07:00
QCTECMDR Service
35efc06202 Merge "ARM: dts: msm: save 2M vmemmap of memory on sun" 2024-07-22 15:45:25 -07:00
Patrick Daly
dea51fc5d2 ARM: dts: msm: save 2M vmemmap of memory on sun
There is 512K of DDR in a section memory and the rest is carveout in a
memory region [0x98000000 a0000000).  As section size is 128M, which
require 2M of memmap. Lose this 512K to save (2M - 512K) of memory.

CRs-Fixed: 3792207
Change-Id: I5fa1f7a366eefd464e67099ff1835dc84423d18b
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
2024-07-18 17:46:56 -07:00
QCTECMDR Service
bcce78b2e9 Merge "ARM: dts: msm: Add platform_mpam noc_bw node for sun" 2024-07-14 23:20:15 -07:00
QCTECMDR Service
4b498459a9 Merge "ARM: dts: qcom: Enable keep-running for OEMVM" 2024-07-14 19:58:24 -07:00
Huang Yiwei
8dbf04a5a5 ARM: dts: msm: Add platform_mpam noc_bw node for sun
Add platform_mpam noc_bw node for sun.

Change-Id: I878908109eed35e7fe3cf6e70bc78e51d2a793b2
Signed-off-by: Huang Yiwei <quic_hyiwei@quicinc.com>
2024-07-15 08:17:21 +08:00
QCTECMDR Service
cd5d297206 Merge "ARM: dts: msm: gunyah: Add large dmabuf test nodes for sun" 2024-07-12 04:26:17 -07:00
QCTECMDR Service
511f0ea94f Merge "ARM: dts: msm: Disable clock gating for sun" 2024-07-12 00:54:40 -07:00
Amir Vajid
15e281f23e ARM: dts: msm: Map llcc gold bwmon as non-early for sun
Update llcc gold bwmon to have its memory mapped as
non-early for sun.

Change-Id: I190283c136736b069eaed6805f5813ceb0c2d38f
Signed-off-by: Amir Vajid <quic_avajid@quicinc.com>
2024-07-11 12:48:22 -07:00
Georgi Djakov
eefeac1056 ARM: dts: msm: gunyah: Add large dmabuf test nodes for sun
Add test node to sun.dtsi, sun-vm.dtsi and sun-oemvm.dtsi
to validate large dmabuf transfer functionality.

Change-Id: I17cd06d12e18f26a6afe7c2da13fcca23a375b04
Signed-off-by: Georgi Djakov <quic_c_gdjako@quicinc.com>
2024-07-10 16:18:43 -07:00
Cong Zhang
a3ac740d0d ARM: dts: qcom: Enable keep-running for OEMVM
Add keep-running property for OEMVM to let OEMVM shutdown gracefully
even if qcrosvm got killed.

Change-Id: I6b78f13f095ab8a3b068d94219b28cebbae2a75a
Signed-off-by: Cong Zhang <quic_congzhan@quicinc.com>
2024-07-08 19:49:03 -07:00
QCTECMDR Service
ae09b22a5a Merge "ARM: dts: msm: sun: Enlarge WCNSS and ADSP IOMMU range to 2G" 2024-06-28 04:16:35 -07:00
Yu Tian
023ab01421 ARM: dts: msm: sun: Enlarge WCNSS and ADSP IOMMU range to 2G
Enlarge WCNSS and ADSP MMU group range from 640MB to 2GB.

Change-Id: I86dbe3c6d82561383b050c0cccfebf07bf74eed6
CRs-Fixed: 3853708
Signed-off-by: Yu Tian <quic_yutian@quicinc.com>
2024-06-27 20:14:19 -07:00
Gaurav Kashyap
d0c70244cb ARM: dts: msm: Disable clock gating for sun
Disable the GPCE clock gating enabled on sun
kernels.

Change-Id: I6cf212c53dcc8252e2561089e2d7ad3c7bd4cea4
Signed-off-by: Gaurav Kashyap <quic_gaurkash@quicinc.com>
2024-06-27 18:05:52 -07:00
QCTECMDR Service
4d78f89b8a Merge "ARM: dts: qcom: Remove gold bwmon low power cpu for sun" 2024-06-27 15:28:37 -07:00
Amir Vajid
b260a7e489 ARM: dts: qcom: Remove gold bwmon low power cpu for sun
Remove low power cpu property as it is no longer needed
to enable the feature.

Change-Id: Idc8f21b44b36ed73a5dc1c761b6195134c4cb1bf
Signed-off-by: Amir Vajid <quic_avajid@quicinc.com>
2024-06-26 23:44:25 -07:00
QCTECMDR Service
870190b56a Merge "ARM: dts: msm: Add UFS ESI CPU mask for sun" 2024-06-26 02:16:31 -07:00
QCTECMDR Service
bb431332af Merge "ARM: dts: msm: Enable scmi_clk protocol to CPUCP on Sun" 2024-06-25 13:28:08 -07:00
QCTECMDR Service
b0c8025402 Merge "ARM: dts: qcom: Add ready ack to the list of soccp interrupts" 2024-06-25 10:48:42 -07:00
qctecmdr
e7dca19272 Merge "ARM: dts: msm: Add optional cluster device properties for sun" 2024-06-18 06:40:43 -07:00
Maulik Shah
dd6fce7356 ARM: dts: msm: Add optional cluster device properties for sun
Add properties like premature count, sample invalid time and whether
to use bias timer for cluster device.

Change-Id: I487e420ce422766b18d6c86632c521215b0ed484
Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
2024-06-18 11:48:13 +05:30
qctecmdr
deb2a9ceb6 Merge "ARM: dts: msm: Add GLINK PKT loopback node for sun" 2024-06-17 11:27:12 -07:00
Mike Tipton
49c9ea7847 ARM: dts: msm: Enable scmi_clk protocol to CPUCP on Sun
CPUCP exposes certain clocks over SCMI. Enable the clock protocol to
handle these.

Change-Id: Idfc040e852cb19adae8340f6ceda7f95f52ccb1c
Signed-off-by: Mike Tipton <quic_mdtipton@quicinc.com>
2024-06-15 23:20:09 +08:00
Manish Pandey
96c9f00c8b ARM: dts: msm: Add UFS ESI CPU mask for sun
Add CPUs for each CQ in qcom,esi-affinity-mask.

Change-Id: I78dd9b6ffa28aceaeb5feeaec543172c672bb986
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
2024-06-13 01:25:07 -07:00
qctecmdr
3bed654494 Merge "ARM: dts: msm: Add the gpu_speed_bin fuse entry on sun" 2024-06-12 18:27:38 -07:00
Gokul krishna Krishnakumar
d7483f4aed ARM: dts: qcom: Add ready ack to the list of soccp interrupts
Add an extra bit in the SOCCP SMP2P to check if the soccp is in D0.

Change-Id: I0df3ab9b135e4273d028443cecf8887e7ad794ab
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
2024-06-11 13:53:08 -07:00
qctecmdr
dcda3f9af5 Merge "ARM: dts: qcom: add low power cpu to gold bwmon for sun" 2024-06-11 10:59:56 -07:00
Vishnu Santhosh
fb27e21352 ARM: dts: msm: Add GLINK PKT loopback node for sun
GLINK PKT provides a userspace interface to RPMSG GLINK through
character device nodes. Add the loopback node and corresponding
channel device to enable GLINK communication from userspace to
communicate with loopback test server.

Change-Id: I8777564c695c5b5718d5016e79ec09beeb353d90
Signed-off-by: Vishnu Santhosh <quic_vishsant@quicinc.com>
2024-06-11 09:46:13 +05:30
Lynus Vaz
1dcffc73d8 ARM: dts: msm: Add the gpu_speed_bin fuse entry on sun
Add the gpu_speed_bin fuse entry on sun devices.

Change-Id: I790d3456e7d7108a6ae5ec90fc791fde6b1eeab8
Signed-off-by: Lynus Vaz <quic_lvaz@quicinc.com>
2024-06-05 13:39:36 -07:00