Commit Graph

414 Commits

Author SHA1 Message Date
Chris Lew
23baa335a2 ARM: dts: msm: Add nodes for IMS glink communication
Add memshare and glinkpkt nodes to enable the IMS usecase.

Change-Id: Ic2a3a69eb2c77634203b0e42d7181f64a299b177
Signed-off-by: Chris Lew <quic_clew@quicinc.com>
2024-03-14 15:26:23 -07:00
qctecmdr
25f2af01c7 Merge "ARM: dts: msm: Mark videocc clock node as GenPD provider" 2024-03-13 22:54:53 -07:00
qctecmdr
f4d60f0352 Merge "ARM: dts: msm: Add display CRM SW client for Sun" 2024-03-13 18:27:30 -07:00
qctecmdr
e9fe5fd5c2 Merge "ARM: dts: qcom: Added eSE Secure GPIO as reserved" 2024-03-13 03:41:28 -07:00
PRANAY BHARGAV BHAVARAJU
a0eb78d312 ARM: dts: qcom: Added eSE Secure GPIO as reserved
Enforcing access restrictions for eSE secure GPIO
by tagging it as reserved.

Change-Id: Ia525cafe06689708d323ddbc6b65f9ddc4b4647a
Signed-off-by: PRANAY BHARGAV BHAVARAJU <quic_pbhavara@quicinc.com>
2024-03-13 10:35:48 +05:30
Priyansh Jain
d17872c915 ARM: dts: qcom: Add GPU scan dump skip cooling device support for sun
Add GPU scan dump skip cooling device support for sun.
Add skin mitigation rule for gpu scan dump skip cooling device as
per recommendation.

Change-Id: I1a3c5de6f37ce064d8b74c36297c93a0f31db01d
Signed-off-by: Priyansh Jain <quic_priyjain@quicinc.com>
2024-03-12 20:40:33 -07:00
qctecmdr
3a35215b56 Merge "ARM: dts: msm: Disable creation of psi cgroups" 2024-03-12 18:03:09 -07:00
qctecmdr
b136cb95a8 Merge "ARM: dts: msm: Update memory command line paramenters" 2024-03-12 16:03:09 -07:00
qctecmdr
6955597667 Merge "ARM: dts: msm: Increase system cma size for sun" 2024-03-12 01:44:25 -07:00
qctecmdr
a16ef65ef1 Merge "ARM: dts: qcom: SOCCP wdog INT is EDGE triggered HIGH" 2024-03-11 19:08:29 -07:00
Patrick Daly
b089ba2f99 ARM: dts: msm: Disable creation of psi cgroups
Although this is already present in CONFIG_CMDLINE in gki_defconfig, it
appears to be being overridden by the commandline specified in devicetree.

Change-Id: If61b4cfd11a15a7c36fb01875b7c77ac7c5bde8b
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
2024-03-11 17:50:03 -07:00
Patrick Daly
d9c346be79 ARM: dts: msm: Update memory command line paramenters
Setting dma32_disable causes all memory to be placed in ZONE_NORMAL,
and reduces overhead in page allocation.

Change-Id: I770fe2688081b457a121afd23d6d924423680e5f
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
2024-03-11 17:46:49 -07:00
Patrick Daly
2cd1424101 ARM: dts: msm: Increase system cma size for sun
Add 4.5 MB for use by minidump_memory driver.
Add 2 MB for use by memshare IMS usecase.

Change-Id: I5f3897e24dd4b7a1c7bd3f883c4837eaa3ca384a
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
2024-03-11 17:44:03 -07:00
Gokul krishna Krishnakumar
911086ca2e ARM: dts: qcom: SOCCP wdog INT is EDGE triggered HIGH
Fix the interrupt line for wdog INT to EDGE triggered.

Change-Id: Id9ca3f3a632b95bfa17cedacda0936845413ded1
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
2024-03-11 15:32:14 -07:00
Mukesh Ojha
aa1ca3fb0b ARM: dts: msm: Enable qcom,ramoops device
qcom,ramoops driver takes memory dynamically
available from a given range and give it to
ramoops for its usage.

Change-Id: I94ece0f9d25719e240ecb5c7f47a3b1fe83fbab1
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
2024-03-11 11:08:53 -07:00
qctecmdr
89b1f712d0 Merge "ARM: dts: msm: Increase TA memory from 16MB to 20 MB" 2024-03-11 03:10:27 -07:00
Akhil Budampati
0abea575a1 ARM: dts: msm: Increase TA memory from 16MB to 20 MB
Loadable section memory of FingerPrint(FP) Sensor TA
has to be increased which requires increase in qseecom_ta mem.

Change-Id: Ie0a31662cd7b05f3aff0a41c275089ed7684d8b0
Signed-off-by: Akhil Budampati <quic_abudampa@quicinc.com>
2024-03-10 23:27:26 -07:00
Magesh M
c41d01f245 ARM: dts: qcom: Revert SP-PBL related register from sun dtsi
Removed SP PBL Patch Version Register from sun dtsi
since it is no longer used.

Change-Id: I52b28ed1a07676188a39c09b72c0e2364cfc0ac2
Signed-off-by: Magesh M <quic_murugan@quicinc.com>
2024-03-07 12:44:16 -08:00
Amir Vajid
38729f5369 ARM: dts: msm: Add PDP mailbox and logging nodes for sun
Add device nodes to configure PDP mailbox and add support
for PDP logging on both PDP cores.

Change-Id: I2393334d33373df3447f5140cc66cd7624faf0cd
Signed-off-by: Amir Vajid <quic_avajid@quicinc.com>
2024-03-06 09:44:26 -08:00
Jagadeesh Kona
c0a6035e47 ARM: dts: msm: Mark GCC clock node as GenPD provider
Mark GCC clock node as GenPD provider and disable the
PCIE GDSC regulator nodes.

Change-Id: I98fc6709592c393259da77443d4b6e580e61a0b8
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
2024-02-29 16:42:16 +05:30
Jagadeesh Kona
733bef4648 ARM: dts: msm: Mark dispcc clock node as GenPD provider
Mark dispcc clock node as GenPD provider and disable the
display GDSC regulator nodes.

Change-Id: I91cf788254ca0bd78a02dc4b196745da380fb74b
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
2024-02-29 02:28:18 -08:00
Jagadeesh Kona
b10f0ee315 ARM: dts: msm: Mark videocc clock node as GenPD provider
Mark videocc clock node as GenPD provider and disable the
video GDSC regulator nodes.

Change-Id: I206ad77302fa8ece5b4efe28e20d8c1c23d9fac7
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
2024-02-29 02:22:59 -08:00
qctecmdr
7186d56558 Merge "ARM: dts: qcom: use property “iommu-addresses” for SDC2" 2024-02-26 13:35:10 -08:00
qctecmdr
6f231e832d Merge "ARM: dts: msm: Add cpufreq_thermal device for Sun" 2024-02-23 19:06:20 -08:00
qctecmdr
ec26fa8460 Merge "ARM: dts: msm: Remove ufs bus voting entries" 2024-02-23 02:50:34 -08:00
qctecmdr
9d4a54d341 Merge "ARM: dts: qcom: use property “iommu-addresses” for UFSHC" 2024-02-22 13:42:34 -08:00
qctecmdr
f32579f132 Merge "ARM: dts: msm: Enable ftrace in minidump for Sun/Pineapple" 2024-02-22 13:42:34 -08:00
Bao D. Nguyen
aacd5dfda2 ARM: dts: msm: Remove ufs bus voting entries
Adopt the  upstream ufs bus voting implementation using
commit <03ce80a1bb8>
("scsi: ufs: qcom: Add support for scaling interconnects").
With this implementation, the Qualcomm's bus voting parameters
are moved to the driver source code. As a result, remove the bus
voting DT entries here.

Change-Id: I6366fe76fba4022cbd97bb757eaac2183274bcd2
Signed-off-by: Bao D. Nguyen <quic_nguyenb@quicinc.com>
2024-02-21 22:40:26 -08:00
Kuldeep Singh
dc3fd7726c ARM: dts: msm: Add tmecom node for sun
Add DT support for tmecom driver.

Change-Id: I91efa6fd0461144a84c14ba2a6393a8b866459ff
Signed-off-by: Kuldeep Singh <quic_kuldsing@quicinc.com>
2024-02-22 12:09:58 +05:30
Ziqi Chen
82e81bc907 ARM: dts: qcom: use property “iommu-addresses” for SDC2
The upstream commit <a5bf3cfce8cb7>
("iommu: Implement of_iommu_get_resv_regions()")
The upstream linux community has added a devicetree property
"iommu-addresses", which describes to the DMA api what IOVA
addresses a device can/cannot use. So we replace “qcom,iommu-
dma-addr-pool” by “iommu-addresses” since kernel 6.5 to follow
upstream.

Change-Id: If18f14d6cb13aa2ed67c1417295fc30723b0c932
Signed-off-by: Ziqi Chen <quic_ziqichen@quicinc.com>
2024-02-22 13:46:04 +08:00
Ziqi Chen
10d8b6507b ARM: dts: qcom: use property “iommu-addresses” for UFSHC
The upstream commit <a5bf3cfce8cb7>
("iommu: Implement of_iommu_get_resv_regions()")
has added a devicetree property "iommu-addresses", which
describes to the DMA api what IOVA addresses a device
can/cannot use. So we replace “qcom,iommu-dma-addr-pool”
by “iommu-addresses” since kernel 6.5 to follow upstream.

Change-Id: I9c99fc931fa9a59a472f371bfb59f615f83539f4
Signed-off-by: Ziqi Chen <quic_ziqichen@quicinc.com>
2024-02-22 13:45:46 +08:00
Mike Tipton
baa9d42f02 ARM: dts: msm: Add cpufreq_thermal device for Sun
This device is necessary to notify the scheduler about CPU thermal
pressure.

Change-Id: Ibf1e636dfee32ab8b7c3b9202264603d638c577a
Signed-off-by: Mike Tipton <quic_mdtipton@quicinc.com>
2024-02-21 10:25:09 -08:00
Mukesh Ojha
561adf361b ARM: dts: msm: Enable ftrace in minidump for Sun/Pineapple
Add ftrace_dump_on_oops in kernel cmdline to enable capture
of ftrace in minidump for pineapple/sun SoCs.

Change-Id: I1d07d01dbd5f4240f12eba53a252ec8941262623
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
2024-02-21 03:21:01 -08:00
qctecmdr
399e6c75bf Merge "ARM: dts: msm: Update to newest memory map for sun" 2024-02-15 17:27:56 -08:00
qctecmdr
b77648da9e Merge "ARM: dts: msm: Increase secure display heap size" 2024-02-15 17:27:55 -08:00
qctecmdr
cc774f04b5 Merge "ARM: dts: qcom: Enable UFS MCQ on Sun platforms" 2024-02-15 15:07:00 -08:00
qctecmdr
542e66c4b8 Merge "ARM: dts: msm: Define tmecrashdump offset for tz-log node for sun" 2024-02-15 15:07:00 -08:00
qctecmdr
9158112b17 Merge "ARM: dts: msm: Update SW DRV IDs for sun" 2024-02-15 15:06:59 -08:00
Mike Tipton
ce647911fd ARM: dts: msm: Add display CRM SW client for Sun
Required to vote BW through the display SW client.

Change-Id: I7b49a3e1f9f47dd7634d390b46a5ebd135958bee
Signed-off-by: Mike Tipton <quic_mdtipton@quicinc.com>
2024-02-15 12:48:45 -08:00
qctecmdr
471bd58409 Merge "ARM: dts: qcom: Add TRNG node for Sun" 2024-02-15 12:45:40 -08:00
Maulik Shah
c14c1cd136 ARM: dts: msm: Update SW DRV IDs for sun
There are 6 SW DRV IDs supported for display. Update same.

Change-Id: I5a58e7e81884e5201ef218f4418204aeed47e5ac
Signed-off-by: Maulik Shah <quic_mkshah@quicinc.com>
2024-02-08 10:04:56 +05:30
Yeshwanth Sriram Guntuka
095057ba6f ARM: dts: msm: sun: Add common iommu group for WCNSS and ADSP
Add common iommu group for WCNSS and ADSP for direct
link use case.

Change-Id: I031283713b4f89176d574580f5b11d44f870a0ca
Signed-off-by: Yeshwanth Sriram Guntuka <quic_ysriramg@quicinc.com>
2024-02-07 17:31:29 +05:30
Patrick Daly
491d8caf96 ARM: dts: msm: Increase secure display heap size
According to the camera team, this is required due to camera hw
architecture changes on sun.

Change-Id: Iaba200c194f9758cd506cd871bd4c4853542c028
Signed-off-by: Patrick Daly <quic_pdaly@quicinc.com>
2024-02-05 15:06:42 -08:00
qctecmdr
f6135c12c7 Merge "ARM: dts: msm: add reg-names to cpucp device for sun" 2024-02-04 08:59:18 -08:00
Amir Vajid
2c297e668b ARM: dts: msm: add reg-names to cpucp device for sun
Update cpucp device to include reg-names property.

Change-Id: I78d9d386971952511f66f455857adcc8ea9edf58
Signed-off-by: Amir Vajid <quic_avajid@quicinc.com>
2024-02-02 15:22:07 -08:00
qctecmdr
35bdcb680c Merge "ARM: dts: qcom: Add SPU related register to sun dtsi" 2024-01-31 19:30:06 -08:00
Magesh M
70cc7ae5e7 ARM: dts: qcom: Add SPU related register to sun dtsi
Added SP PBL Patch Version Register to read the SP-PBL
patch version to handle SPSS attach timed out scenario.

Change-Id: Id7ee4df5d09d9c09410bc24fc475ee2a36fca246
Signed-off-by: Magesh M <quic_murugan@quicinc.com>
2024-01-31 14:10:58 -08:00
Ping Li
24c9075c78 ARM: dts: msm: add entry for ssip fuse configuration
Add dtsi entry for ssip fuse configuration on Sun platform.

Change-Id: I1f6dbc9608db1e29aef1d9699820eb1e1d3c9299
Signed-off-by: Ping Li <quic_pingli@quicinc.com>
2024-01-29 22:38:36 -08:00
qctecmdr
eb86f9ab3b Merge "ARM: dts: msm: PCIe SM related power control override" 2024-01-29 17:54:03 -08:00
Anirudh Raghavendra
ae18704842 ARM: dts: msm: Add CMA node for secure DSP
Add CMA memory node for secure fastrpc usecases.

Change-Id: I3c8cf93a91025ebbcb570db6d7b0b82a1554bbb7
Signed-off-by: Anirudh Raghavendra <quic_araghave@quicinc.com>
2024-01-26 10:01:58 -08:00