Yingchao Deng
285a63e7b4
ARM: dts: msm: Reserve 16kb to dcc on TZ for kera
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Reserve 16kb to dcc on TZ while HLOS have 16 KB.
Change-Id: I2063be0924b5719bd2c3abfffc84c0044d74ae37
Signed-off-by: Yingchao Deng <quic_yingdeng@quicinc.com >
2025-02-26 17:29:47 -08:00
QCTECMDR Service
154292c9bd
Merge "ARM: dts: msm: Reserve 32kb to dcc on HLOS for kera"
2025-01-07 23:00:55 -08:00
songchai
8642f7b409
ARM: dts: msm: Reserve 32kb to dcc on HLOS for kera
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Reserve 32kb to dcc on HLOS for kera.
Change-Id: I926dc00c21e46411785392e08121b08ad116003e
Signed-off-by: songchai <quic_songchai@quicinc.com >
2025-01-06 19:12:07 -08:00
songchai
1ccd4eccd3
ARM: dts: msm: enable dcc for kera
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Enable dcc for kera.
Change-Id: I81a206ed0c0869839e1bca7cf349b6a66ab047d4
Signed-off-by: songchai <quic_songchai@quicinc.com >
2024-12-30 21:49:21 -08:00
songchai
054c4aaedd
ARM: dts: msm: Add debug component device tree for Kera
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Add debug component device tree for Kera.
Change-Id: Iaf8453afc5659216c52a67fd1778645f2c960185
Signed-off-by: songchai <quic_songchai@quicinc.com >
2024-09-12 16:58:57 +08:00
