7 Commits

Author	SHA1	Message	Date
Bibek Kumar Patro	3ef01b31f8	ARM: dts: msm: Update memory map for kera ... Update memory map for kera, inline with v4. Change-Id: Ifc5acdc379372239f4fde0f22fcd8c17f66ce636 Signed-off-by: Bibek Kumar Patro <quic_bibekkum@quicinc.com>	2025-03-16 23:02:40 -07:00
songchai	bbf809aca9	ARM: dts: msm: add reserved mem for secure_etr ... Add reserved mem for secure_etr on Kera. Change-Id: Iba7321717cac50b17d85ef03cf3ae16ec407adcc Signed-off-by: songchai <quic_songchai@quicinc.com>	2024-12-16 22:13:59 -08:00
Vijayanand Jitta	0df6a2038e	ARM: dts: msm: Update memory map for kera ... Update memory map for kera, inline with v2. Change-Id: I28488932a269a5c1ef6c131e9385cf7604ea723e Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>	2024-10-29 10:56:14 +05:30
Hrishabh Rajput	3e2858be87	ARM: dts: msm: Add chipinfo region as ext-region for cpusysvm ... Add chipinfo region as ext-region for cpusysvm for Kera. Change-Id: Id353eece5d4b825c75775f1c5be7201260007c1c Signed-off-by: Hrishabh Rajput <quic_hrishabh@quicinc.com>	2024-10-14 11:19:33 +05:30
Vijayanand Jitta	f003382472	ARM: dts: msm: add cma regions for VM's on kera ... Add cma regions for tuivm and oemvm, inline with v1. Change-Id: I117ad4bd3af4fb1c9c3c5bf046fdf903d3ddb99d Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>	2024-10-08 15:55:57 +05:30
Pranav Mahesh Phansalkar	7d4f9f859d	ARM: dts: msm: Add smem nodes for kera ... Add smem nodes for kera SoC. Change-Id: Icaa26bfe01227bc21e0e3bce324779834f204e68 Signed-off-by: Pranav Mahesh Phansalkar <quic_pphansal@quicinc.com>	2024-07-26 12:22:26 +05:30
Bibek Kumar Patro	21061bbb84	ARM: dts: msm: add initial memory configuration for kera ... Add initial memory configuration and reserved memory map for kera, inline with v1. Change-Id: I2b3ed445feebd6141beb59bd23e416711e17747c Signed-off-by: Bibek Kumar Patro <quic_bibekkum@quicinc.com> Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>	2024-07-10 09:43:47 +05:30