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129deb7f1fe8ead72bebf55a4a727162cc4f8536
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2451 Commits

Author SHA1 Message Date
Anand Tarakh
129deb7f1f ARM: dts: msm: Add touch reset and interrupt gpio in tuna-vm platforms 
Add touch reset and interrupt gpio in tuna-vm QRD, MTP, RCM and CDP
platform.

Change-Id: I0e87a8d72a32b1c2fd4599b6cde04df1ecd0f854
Signed-off-by: Anand Tarakh <quic_atarakh@quicinc.com>
 2025-03-24 12:10:56 +05:30
QCTECMDR Service
1e6911a09f Merge "ARM: dts: msm: Add initial device tree for QCS610 LE target" 2025-03-20 20:07:39 -07:00
QCTECMDR Service
7e07590570 Merge "ARM: dts: msm: Enable ship-mode immediate property for tuna/kera" 2025-03-19 20:08:03 -07:00
QCTECMDR Service
81f118efaa Merge "ARM: dts: msm: Update memory map for kera" 2025-03-18 11:07:51 -07:00
Kunal Singh Ranawat
458709ab91 ARM: dts: msm: Add initial device tree for QCS610 LE target 
Added initial device tree for QCS610 LE target.

Change-Id: Ia8b8790fa0916a8a87a5bc696f5b9e23d7e951dc
Signed-off-by: Kunal Singh Ranawat <quic_kranawat@quicinc.com>
 2025-03-18 00:08:10 -07:00
QCTECMDR Service
51286b910f Merge "ARM: dts: msm: Add support for Tuna7 and TunaP SoC" 2025-03-17 13:39:48 -07:00
QCTECMDR Service
f6d5bc0d73 Merge "ARM: dts: qcom: Modifying silver l3 mapping" 2025-03-17 08:28:58 -07:00
Kavya Nunna
5746ab658d ARM: dts: msm: Enable ship-mode immediate property for tuna/kera 
Enable ship-mode immediate property for battery charger
for tuna and kera platforms.

Change-Id: I56cd27211b673e02d002432662e1e83a1a3b4ba1
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>
 2025-03-17 02:34:28 -07:00
Hrishabh Rajput
b0ed9373e7 ARM: dts: msm: Add support for Tuna7 and TunaP SoC 
Add devicetree support for Tuna7 and TunaP SoC.

Change-Id: I5f94559c66f00bcb746fc05f7c445a8e2501d862
Signed-off-by: Hrishabh Rajput <quic_hrishabh@quicinc.com>
 2025-03-17 13:50:32 +05:30
Bibek Kumar Patro
3ef01b31f8 ARM: dts: msm: Update memory map for kera 
Update memory map for kera, inline with v4.

Change-Id: Ifc5acdc379372239f4fde0f22fcd8c17f66ce636
Signed-off-by: Bibek Kumar Patro <quic_bibekkum@quicinc.com>
 2025-03-16 23:02:40 -07:00
Vinay Rijhwani
6a0cca90e2 ARM: dts: qcom: Modifying silver l3 mapping 
Modifying silver-l3 mapping.

Change-Id: I68c321dca730daf7ba7665ed884ea4034d4f5c67
Signed-off-by: Vinay Rijhwani <quic_vrijhwan@quicinc.com>
 2025-03-13 00:37:07 -07:00
QCTECMDR Service
7cd5aa0fed Merge "ARM: dts: msm: Increase pipe clock toggles during L1SS entry" 2025-03-11 00:13:14 -07:00
QCTECMDR Service
97b1cc3cc7 Merge "ARM: dts: qcom: Add PMIC ECID devices for sun" 2025-03-08 22:13:53 -08:00
QCTECMDR Service
477a02d816 Merge "ARM: dts: msm: Add qfprom compatible string for parrot" 2025-03-05 02:31:01 -08:00
QCTECMDR Service
2c7b7ad04b Merge "ARM: dts: msm: Reserve 16kb to dcc on TZ for kera" 2025-03-05 02:31:01 -08:00
Brindha T
3fb8ec2740 ARM: dts: qcom: Add PMIC ECID devices for sun 
Add PMIC ECID (Exclusive Chip Identifier) changes to sun variants.

Change-Id: I814b2c676d0b45791c8724a568a548039f18a7e0
Signed-off-by: Brindha T <quic_brint@quicinc.com>
 2025-03-04 16:12:43 +05:30
songchai
4285de821b Revert "ARM: dts: msm: add dcc registers into dt for tuna" 
This reverts commit f3fae6c2e9.

Change-Id: I59abb9129af619bec885cd2d52110070524b229d
Signed-off-by: songchai <quic_songchai@quicinc.com>
 2025-03-03 18:30:15 -08:00
QCTECMDR Service
9f39fed686 Merge "ARM: dts: msm: Add HWKM node" 2025-03-03 14:52:59 -08:00
Vivek Pernamitta
a3a111ed95 ARM: dts: msm: Increase pipe clock toggles during L1SS entry 
Increase the number of pipe clock toggles that will occur after
phystatus goes high at the output of the PHY during L1SS/P2 entry
in PCS_PCIE_POWER_STATE_CONFIG6 register, so that if the phy and
controller goes out of sync this may help us. The number of pipe
clock toggles is equal to (4*value)+1.

Change-Id: I7a31882f18879ef990825aa2d978fc7f39233472
Signed-off-by: Vivek Pernamitta <quic_vpernami@quicinc.com>
Signed-off-by: Krishna Chaitanya Chundru <krishna.chundru@oss.qualcomm.com>
 2025-03-03 02:19:47 -08:00
Saranya R
ffcd57a92c ARM: dts: msm: Add qfprom compatible string for parrot 
Add the soc-specific compatible string as it is
required to apply appropriate keepout regions.

Change-Id: I59fe0c9dffdf182bfb52468ef5a0d564ad7a8b38
Signed-off-by: Saranya R <quic_sarar@quicinc.com>
 2025-03-03 01:06:14 -08:00
Shivangi Kesharwani
70ca685e86 ARM: dts: msm: Add HWKM node 
Add dtsi node to enable Hardware key manager for monaco target.
And add the device tree bindings for the Hardware key manager driver.

Change-Id: If1e38c3c71148fd85058eb31d4eee5f806e47fef
Signed-off-by: Shivangi Kesharwani <quic_skesharw@quicinc.com>
 2025-03-02 23:21:38 -08:00
QCTECMDR Service
42f35894e1 Merge "ARM: dts: msm: Update slave address of smb1393 for Kera qrd" 2025-03-02 22:53:12 -08:00
QCTECMDR Service
2e1aa4f45f Merge "ARM: dts: msm: add qcom,pm-qos-latency for kera" 2025-02-27 17:48:58 -08:00
Uttkarsh Aggarwal
2e2af38cfe ARM: dts: msm: add qcom,pm-qos-latency for kera 
It will help for USB KPI.

Change-Id: Icd313491c6228095a02144ba4473a5a61fb96f80
Signed-off-by: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com>
 2025-02-27 00:12:03 -08:00
Yingchao Deng
285a63e7b4 ARM: dts: msm: Reserve 16kb to dcc on TZ for kera 
Reserve 16kb to dcc on TZ while HLOS have 16 KB.

Change-Id: I2063be0924b5719bd2c3abfffc84c0044d74ae37
Signed-off-by: Yingchao Deng <quic_yingdeng@quicinc.com>
 2025-02-26 17:29:47 -08:00
Sneh Mankad
c7cb6a9a92 ARM: dts: qcom: Add stats and sys-pm-vx devices for sdxkova 
Add devices to track CPU LPMs, SoC level LPMs, and system pm
violators.

Change-Id: I65a0dfeb814b47bdfcc4468ec8f1e7f63338581c
Signed-off-by: Sneh Mankad <quic_smankad@quicinc.com>
 2025-02-25 20:54:37 -08:00
QCTECMDR Service
4358e7ec1c Merge "ARM: dts: msm: add qcom,pm-qos-latency for tuna" 2025-02-25 11:13:36 -08:00
QCTECMDR Service
9799c3684e Merge "ARM: dts: msm: add qcom,pm-qos-latency for sun" 2025-02-25 11:13:36 -08:00
QCTECMDR Service
9ddd2c748e Merge "ARM: dts: qcom: Update ufs device tree property for sun" 2025-02-25 03:14:37 -08:00
Uttkarsh Aggarwal
b1860f49b1 ARM: dts: msm: add qcom,pm-qos-latency for sun 
It will help for USB KPI.

Change-Id: I4b4ba5cc7aca95952a91bbd21f5d1cc2ab020ca2
Signed-off-by: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com>
 2025-02-24 14:18:39 +05:30
Tingguo Cheng
4264c3a1d5 ARM: dts: msm: Update slave address of smb1393 for Kera qrd 
Update the slave address for slave charger debug support.
As well as update the slave address for glink adc channels
to fix reading I/O errors.

Change-Id: If1a0725aeeb1a67d7a19a3a5629ca2be44ff674c
Signed-off-by: Tingguo Cheng <quic_tingguoc@quicinc.com>
 2025-02-23 22:36:26 -08:00
Uttkarsh Aggarwal
93a260589d ARM: dts: msm: add qcom,pm-qos-latency for tuna 
It will help for USB KPI.

Change-Id: Icc2cc1cd63998625b2ed9dd99a81b45ed3971c15
Signed-off-by: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com>
 2025-02-23 20:13:32 -08:00
QCTECMDR Service
38969a0ac9 Merge "ARM: dts: msm: Change iommu-dma to atomic from fastmap for Monaco" 2025-02-20 21:28:02 -08:00
QCTECMDR Service
2769690582 Merge "ARM: dts: qcom: add sun le target" 2025-02-20 21:28:02 -08:00
QCTECMDR Service
187e3a5b4e Merge "ARM: dts: msm: Removing wcd node from kera qrd" 2025-02-20 21:28:02 -08:00
Viken Dadhaniya
bd55757e4b ARM: dts: msm: Change iommu-dma to atomic from fastmap for Monaco 
Fix the memory mapping error for non dma-coherent target Monaco
when iommu-dma is used as "fastmap" by changing it to "atomic".

Hence, Change iommu-dma to atomic setting.

Change-Id: Ic21cbd4d5e9e429dd6aa577652d0ccb1a9acc99c
Signed-off-by: Viken Dadhaniya <quic_vdadhani@quicinc.com>
 2025-02-19 21:28:09 -08:00
QCTECMDR Service
1f749d3dea Merge "ARM: dts: msm: Update the tuna gcc and display clock controller nodes" 2025-02-18 12:58:36 -08:00
QCTECMDR Service
a7b3572ba8 Merge "ARM: dts: msm: Reserve 16kb to dcc on TZ for tuna" 2025-02-17 19:13:47 -08:00
Manish Pandey
183620f22f ARM: dts: qcom: Update ufs device tree property for sun 
Replace `qcom,storage-boost` with `qcom,enforce-high-irq-cpus`.

Change-Id: I9d7aecb46f2c28f27e74d600723164bcab8d830c
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
 2025-02-17 13:20:33 +05:30
QCTECMDR Service
2dfb655f06 Merge "ARM: dts: msm: correct static atid for snoc & tpdm-wcss" 2025-02-16 19:28:20 -08:00
Xiaoqi Zhuang
eed40560ba ARM: dts: msm: correct static atid for snoc & tpdm-wcss 
Correct static atid for snoc & tpdm-wcss.

Change-Id: I112643221a99e38ba672b5649d98dbd5b1095e12
Signed-off-by: Xiaoqi Zhuang <quic_xiaozhua@quicinc.com>
 2025-02-16 14:24:52 +08:00
QCTECMDR Service
cce90c8656 Merge "ARM: dts: qcom: Update correct cpu sensor to cpu pause mapping for kera" 2025-02-14 16:09:52 -08:00
QCTECMDR Service
4e2e6546e7 Merge "ARM: dts: msm: Replace force-low-pwm-size with mid-res-support" 2025-02-14 16:09:52 -08:00
QCTECMDR Service
127dd773cc Merge "ARM: dts: qcom: Add show-resume-irqs device for sdxkova" 2025-02-13 02:14:26 -08:00
songchai
067ed2e371 ARM: dts: msm: Reserve 16kb to dcc on TZ for tuna 
Reserve 16kb to dcc on TZ while HLOS have 16 KB.

Change-Id: Ic30e6c0c32d6994e495091b4bddfa07e55c36285
Signed-off-by: songchai <quic_songchai@quicinc.com>
 2025-02-13 14:13:04 +08:00
Shudan Liu
0bff45c93b ARM: dts: qcom: add sun le target 
Add sun le target on bazel file.

Change-Id: If36563ad405f199a36f8bf4a020960c77ebba3eb
Signed-off-by: Shudan Liu <quic_c_shudan@quicinc.com>
 2025-02-13 13:36:30 +08:00
QCTECMDR Service
8dc0203733 Merge "ARM: dts: msm: add trusted touch properties for kera qrd" 2025-02-12 20:17:34 -08:00
QCTECMDR Service
262ebb47a7 Merge "ARM: dts: msm: Add PDC as wakeup parent to TLMM for sdxkova" 2025-02-12 01:15:55 -08:00
QCTECMDR Service
d81d2e684e Merge "ARM: dts: qcom: Update ESI affinity mask for tuna" 2025-02-12 01:15:55 -08:00
QCTECMDR Service
9af51f82de Merge "ARM: dts: qcom: Update cpu pause mappings to cpu tsens sensors for tuna" 2025-02-12 01:15:55 -08:00