Update height alignments from 20 to 40 for HD 60FPS cmd mode to
match DSC slice settings. The roi height and width alignment
must be integral multiple of DSC slice height and width.
Change-Id: I127af4c4e6a453757f60677bac787cd4bd4b6d07
Signed-off-by: Lei Chen <quic_chenlei@quicinc.com>
This change add a mode with FHD+ resolution for csot panel.
Change-Id: I72c5efc4159fb0ed99fcaa5fd93069601993d598
Signed-off-by: Jinfeng Gu <quic_gjinfeng@quicinc.com>
Add display cesta related DT node and configs on sun target.
Move the GDSC & MDP core clk from mdp to cesta node, as it will
be controlled through cesta. Add the cesta related register
offsets in trusted-vm DT for incoming io validation during the
transition.
Change-Id: I1f5ebf59db2169dfae3801f572c80af9e016e667
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
Update panel-roi-alignment with correct alignment values.
Change-Id: I783ff3a32008db53c59f8fa11d72b9b44cab6575
Signed-off-by: Sabarinath M B <quic_sabamb@quicinc.com>
This change updates the partial update roi for csot cmd mode panel.
Change-Id: Iafdbe00243a5a2f3162e2dbfc2a79143ab4a29ff
Signed-off-by: Jinfeng Gu <quic_gjinfeng@quicinc.com>
This change add multiple timing nodes for nt37801 on sun target.
Change-Id: I36f3271c86a6765ca62bda60b23954d7d5efbf14
Signed-off-by: Jinfeng Gu <quic_gjinfeng@quicinc.com>
Modify the continuous splash memory region to match UEFI configured
address. Add a gap in HLOS unsecure context-bank to avoid using
the splash memory region.
Change-Id: Ifa7927b8ecccd0542ef3f37cf781a97f594102b3
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
This change enable partial update for cmd mode panel on sun target.
Change-Id: I26eeaca7e8a5a59ca9155f5882c1977c66f4ff23
Signed-off-by: Jinfeng Gu <quic_gjinfeng@quicinc.com>
Add smmu secure context bank to the connector-list on sun target
to make it as part of the drm component dependent list.
Change-Id: I9e1d65f32b864f12e9683566771acdc687923380
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
Add continuous splash memory region & ramdump memory region
on sun target to enable the features.
Change-Id: Ia7bed7b30935a912c977a543430a2b9ad0921439
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
Since mdss_dsi_phy* providers only support two clocks, fix current
implementation which indexes out of bounds and causes a failure
in dsi when trying to get clocks.
Change-Id: I671b1f4032c124a515c4d5cebbbd098fdfaca95e
Signed-off-by: Rohith Iyer <quic_rohiiyer@quicinc.com>
Add pm8550_gpios node and gpio information to support LCD panels.
Change-Id: Ie755d57d7acd16d4bfc8ac6c0cf3f2d0b5ff15e6
Signed-off-by: Rohith Iyer <quic_rohiiyer@quicinc.com>
Adds missing power supply node to pull up a pin necessary for CSOT
panel's CPHY mode.
Change-Id: I260ae895a015cdc6a02a89d986aa8d3d62c7c1d0
Signed-off-by: Kirill Shpin <quic_kshpin@quicinc.com>
This change adds DSI nodes to the connectors list for sun target.
Change-Id: Idabce49d9abec0e5a310dbe59fbfb4a18ac2b226
Signed-off-by: Rohith Iyer <quic_rohiiyer@quicinc.com>
Add device tree files required for DPU driver on sun target.
Move bindings for all mdp, dsi, panels, hdcp to opensource project.
Change-Id: I1c6575313e33c5727f48ce94fe8b51cd9c62995d
Signed-off-by: Varsha Suresh <quic_varssure@quicinc.com>
Signed-off-by: Veera Sundaram Sankaran <quic_veeras@quicinc.com>
