In this change removing wcd node from qrd platform
because in qrd we have Tambora not Harmonium.
Change-Id: Iac222e0d201e9126523d2540cddeb8db5a758e9f
Signed-off-by: Uttkarsh Aggarwal <quic_uaggarwa@quicinc.com>
Update correct cpu sensor to cpu pause mapping for kera.
Change-Id: I56d72cb0042d957b59ecd8c9c7ce01e978982a0a
Signed-off-by: Priyansh Jain <quic_priyjain@quicinc.com>
Add show-resume-irqs feature to show the irq number that triggered
suspend exit.
Change-Id: I54c59bdc1ae476ca7a86fd34976744eb3db6dcf9
Signed-off-by: Sneh Mankad <quic_smankad@quicinc.com>
Update cpu pause mappings to cpu tsens sensors for tuna.
Change-Id: I998e4e916e8f552d2705cd51b1d6053070fc2470
Signed-off-by: Priyansh Jain <quic_priyjain@quicinc.com>
modify the include files for kera iot dts.
Change-Id: Ia3b7d66bc29d9ea68a71eedd2131aa088d773319
Signed-off-by: Bhasker Reddy Komatireddy <quic_kbhasker@quicinc.com>
Enable idle states for kera VM to enable VCPUs to enter LPM
when no load is running on them.
Change-Id: I0e01f36557fedf68a7beb152025ab14b66fff7dc
Signed-off-by: Sneh Mankad <quic_smankad@quicinc.com>
Add device to show wakeup irq during system resume.
Change-Id: I1add0f44cd1773b5f61afbfc25f2c70f3323ceda
Signed-off-by: Sneh Mankad <quic_smankad@quicinc.com>
Add show-resume-irqs device to show the wakeup irq after system
resume.
Change-Id: I41b742c4251974580c931b7f3c0530aa7fe04333
Signed-off-by: Sneh Mankad <quic_smankad@quicinc.com>
Update ESI affinity mask in tuna device tree for UFS
performance reasons.
Change-Id: Ie06355e2d2604553da0f1e72b6d46032c55cdcf4
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
Update the gcc and display clock controllers removing the tuna 1.0 to
align with the latest clock plan updates for Tuna.
Change-Id: Ib8e9245fc2c1ca90ad3cf8ad614bbe3061bafaeb
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
Sun HDK platform is expected to work without the GNSS board (which also
holds PMR735D) being attached. If the board is not attached,
regulator-ocp-notifier probe may fail as it references some regulators
on PMR735D which do not get probed.
Remove those regulator references from regulator-ocp-notifier as they
are not strictly necessary under it.
Change-Id: Ie6f35a9c6142fe54d7191f9a392074f2e39b2bee
Signed-off-by: Fenglin Wu <quic_fenglinw@quicinc.com>
Add mode voting support for S2B for tuna platforms.
Update the retention threshold to 50ma as per the HW
recommendations.
UFS needs to do mode vote on vccq parent, add mode vote
for S2B for tuna.
Change-Id: I3101f3f1fb0255bdee94d4b854f7b8c73186a035
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>
Add RET mode support for L2G/L3G for tuna platforms as per
the sleep setting recommendation.
While at it set init mode as LPM for L3G and L6K
regulators. As clients always vote for 0 load, the
regulator framework will not apply it and the HPM
init-mode will not change, leading to higher power
consumption. So update the LPM for L3G and L6K regulators.
Change-Id: I5b210ac3e9ffee94889c2390becfaa5eb6c235ab
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>
Add pcie and display CRM voters for kera.
This will allow interconnect providers to target their
votes on CESTA DRV for meeting cesta client bandwidth constraints.
Change-Id: I16198f67ca4a8f7b2d3704044704b78bd267e2f3
Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
Update gpu mitigation level for tuna and BCL threshold based on latest
recommendation.
Change-Id: I51e9e60d6439439ce76fa4cfbdf7e4d909ef727e
Signed-off-by: Priyansh Jain <quic_priyjain@quicinc.com>
Define speed bin and gaming fuse in qfprom node for kera gpu.
Change-Id: Ic0dd6e1c5c3c753cccc44aa25c3c56e340c675fb
Signed-off-by: Kaushal Sanadhya <quic_ksanadhy@quicinc.com>
Update cpucp regions for tuna, inline with v2.
This removes pdp region and reduces cpucp_scandump
region to 1.5MB.
Change-Id: I571d8012545c7c547f0115d86e10183964fe7d8f
Signed-off-by: Vijayanand Jitta <quic_vjitta@quicinc.com>
Add RET mode support for L2G/L3G for tuna platforms as per
the sleep setting recommendation.
While at it set init mode as LPM for L3G and L6K
regulators. As clients always vote for 0 load, the
regulator framework will not apply it and the HPM
init-mode will not change, leading to higher power
consumption. So update the LPM for L3G and L6K regulators.
Change-Id: I5b210ac3e9ffee94889c2390becfaa5eb6c235ab
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>
Update initial DCVS devices for Kera. This
includes frequency and memlat mapping tables.
Change-Id: Ie29a3e0d831fe308b9ee843aba34f6484f461933
Signed-off-by: Sayantan Chakraborty <quic_saycha@quicinc.com>
