This change adds cesta to connectors list on MTP Harmonium, CDP
and QRD platforms.
Change-Id: I5a4bc421daf5a70ec0b67661d826c6adf5c31a80
Signed-off-by: Sampurna Bolloju <quic_sampboll@quicinc.com>
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
Add display cesta related DT node on tuna target. Move
the GDSC & MDP core clock from MDP to cesta node, as it
will be controlled through cesta. Add the cesta
related register offsets in trusted-vm DT.
Change-Id: Ifa9f0b4500c5e6b453395bcf1de492e332d63306
Signed-off-by: Sampurna Bolloju <quic_sampboll@quicinc.com>
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
Add XO clock to sde_cesta node. This will help to vote
XO freq for cesta idle vote for mdp-clk.
Change-Id: I33b309ed9ac2d9013fee8f071c5f07938e651e5f
Signed-off-by: Spurthy Mutturaj <quic_smuttura@quicinc.com>
Signed-off-by: Sampurna Bolloju <quic_sampboll@quicinc.com>
Update passive polling delay for GPU and Modem thermal zones for
tuna and kera.
Change-Id: Id36c9c83de822d0065f62d7f64d48201564a0404
Signed-off-by: Priyansh Jain <quic_priyjain@quicinc.com>
Add dispcc_mx clock controller node as a child node of dispcc
node to register dispcc mx clocks on sun platform.
Change-Id: I1ade67a4f2c09135800b3d5603c8e18a86450de7
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
The USB D+/D- signal lines are first routed through the WCD939x USB
subsystem before connecting to the USB controller on MTP and QRD
platform for kera. Add a phandle to the former to the USB device
node. This will allow the USB driver to control the D+/D- switches
when functionality is needed.
Change-Id: Ie6e76885785cc57974d52df91297a98f300cf666
Signed-off-by: Udipto Goswami <quic_ugoswami@quicinc.com>
The Kera UFS 2.x requires a reference clock of 19.2MHz. Currently,
the reference clock provided by the DTSI node RPMH_LN_BB_CLK3
returns clk_get_rate() as 38.4MHz.
To address this, the handler is updated to use clk8_a4, ensuring the
clock rate is set to 19.2MHz.
Change-Id: I92ad772c7b86652c0dc5bdc3af18a9db900d74e5
Signed-off-by: Manish Pandey <quic_mapa@quicinc.com>
Add display mx clock controller bindings on sun device.
Change-Id: Ie8c87b285bdf5278585bfee42b0eeff70397ce9d
Signed-off-by: Jagadeesh Kona <quic_jkona@quicinc.com>
Add GPU tzone-names to get the GPU temperature on Kera gpu.
Change-Id: Id4f45ffc3b9d34d9019fdbc4b27820c5868590ab
Signed-off-by: Siva Srinivas Venigalla <quic_venigall@quicinc.com>
Add support for clk8_a4 as fixed factor clock for client to be
able to request on them for Kera platform.
Change-Id: I3f6fe7e444231be4489cf4459b1f98cc19417b48
Signed-off-by: Ajit Pandey <quic_ajipan@quicinc.com>
Enable touch support for Kera ATP platform.
Change-Id: Ib4fa26a97df01d90678e5c8c98444ffb1303e0fc
Signed-off-by: Anand Tarakh <quic_atarakh@quicinc.com>
Add idle states for CPU and CPU clusters, add PSCI device to
enable CPU to enter LPMs.
Additionally, update APPS RSC device to be in cluster power
domain to handle RSC activites when cluster is powering off.
Change-Id: Ibe2fa720bc5e81084d380b2e5dc4f8fa8910566c
Signed-off-by: Sneh Mankad <quic_smankad@quicinc.com>
Add support to set function to "wcn_sw_ctrl" & set
mpm_wake_set for SW_CTRL GPIO so that, when this
GPIO goes high, PDC get interrupted and TCS sequence
(which enables RF_CLK) can be started.
Change-Id: Ifdff31f6ad6286a32c3a6f8b500cb6b55b97eb42
CRs-Fixed: 4020424
Removal of I2S0_DATA1 pin, as GPIO_63 is not
used internally for I2S purpose and it is being
used by other subsystem.
Change-Id: I7c3636f9dfcebc68ed3da95793c158e70ad95184
Signed-off-by: Ravulapati Vishnu Vardhan Rao <quic_visr@quicinc.com>
