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ARM: dts: msm: Update Sun V2 GPU external SKU frequency plan

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Update the frequency tables for AB and AC SKUs.

Signed-off-by: Carter Cooper <quic_ccooper@quicinc.com>
Signed-off-by: Xhoendi Collaku <quic_xcollaku@quicinc.com>
Change-Id: I0b19eb8cbb4867ac565fe7c8f381b1c2ba1e3c76
Signed-off-by: Xhoendi Collaku <quic_xcollaku@quicinc.com>
This commit is contained in:
Carter Cooper
2024-05-08 14:24:33 -06:00
committed by Xhoendi Collaku
parent 104705ce03
commit ffe4d3c206
1 changed files with 177 additions and 2 deletions
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179
gpu/sun-v2-gpu-pwrlevels.dtsi
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@@ -32,8 +32,7 @@
qcom,initial-pwrlevel = <9>;
qcom,initial-min-pwrlevel = <9>;
qcom,sku-codes = <SKU_CODE(PCODE_UNKNOWN, FC_AB)
SKU_CODE(PCODE_UNKNOWN, FC_AC)>;
qcom,sku-codes = <SKU_CODE(PCODE_UNKNOWN, FC_AB)>;
/* NOM */
qcom,gpu-pwrlevel@0 {
@@ -181,6 +180,182 @@
#address-cells = <1>;
#size-cells = <0>;
qcom,initial-pwrlevel = <11>;
qcom,initial-min-pwrlevel = <11>;
qcom,sku-codes = <SKU_CODE(PCODE_UNKNOWN, FC_AC)>;
/* TURBO_L1 */
qcom,gpu-pwrlevel@0 {
reg = <0>;
qcom,gpu-freq = <1050000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_TURBO_L1>;
qcom,bus-freq = <11>;
qcom,bus-min = <11>;
qcom,bus-max = <11>;
qcom,acd-level = <ACD_LEVEL_TURBO_L1>;
};
/* NOM_L1 */
qcom,gpu-pwrlevel@1 {
reg = <1>;
qcom,gpu-freq = <967000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_NOM_L1>;
qcom,bus-freq = <11>;
qcom,bus-min = <11>;
qcom,bus-max = <11>;
qcom,acd-level = <ACD_LEVEL_NOM_L1>;
};
/* NOM */
qcom,gpu-pwrlevel@2 {
reg = <2>;
qcom,gpu-freq = <900000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_NOM>;
qcom,bus-freq = <10>;
qcom,bus-min = <7>;
qcom,bus-max = <10>;
qcom,acd-level = <ACD_LEVEL_NOM>;
};
/* SVS_L2 */
qcom,gpu-pwrlevel@3 {
reg = <3>;
qcom,gpu-freq = <832000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L2>;
qcom,bus-freq = <10>;
qcom,bus-min = <7>;
qcom,bus-max = <10>;
qcom,acd-level = <ACD_LEVEL_SVS_L2>;
};
/* SVS_L1 */
qcom,gpu-pwrlevel@4 {
reg = <4>;
qcom,gpu-freq = <734000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L1>;
qcom,bus-freq = <8>;
qcom,bus-min = <6>;
qcom,bus-max = <10>;
qcom,acd-level = <ACD_LEVEL_SVS_L1>;
};
/* SVS_L0 */
qcom,gpu-pwrlevel@5 {
reg = <5>;
qcom,gpu-freq = <660000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS_L0>;
qcom,bus-freq = <6>;
qcom,bus-min = <4>;
qcom,bus-max = <7>;
qcom,acd-level = <ACD_LEVEL_SVS_L0>;
};
/* SVS */
qcom,gpu-pwrlevel@6 {
reg = <6>;
qcom,gpu-freq = <607000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_SVS>;
qcom,bus-freq = <6>;
qcom,bus-min = <4>;
qcom,bus-max = <7>;
qcom,acd-level = <ACD_LEVEL_SVS>;
};
/* Low_SVS_L1 */
qcom,gpu-pwrlevel@7 {
reg = <7>;
qcom,gpu-freq = <525000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS_L1>;
qcom,bus-freq = <4>;
qcom,bus-min = <2>;
qcom,bus-max = <6>;
qcom,acd-level = <ACD_LEVEL_LOW_SVS_L1>;
};
/* Low_SVS */
qcom,gpu-pwrlevel@8 {
reg = <8>;
qcom,gpu-freq = <443000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS>;
qcom,bus-freq = <4>;
qcom,bus-min = <2>;
qcom,bus-max = <6>;
qcom,acd-level = <ACD_LEVEL_LOW_SVS>;
};
/* Low_SVS_D0 */
qcom,gpu-pwrlevel@9 {
reg = <9>;
qcom,gpu-freq = <389000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D0>;
qcom,bus-freq = <4>;
qcom,bus-min = <2>;
qcom,bus-max = <6>;
qcom,acd-level = <ACD_LEVEL_LOW_SVS_D0>;
};
/* Low_SVS_D1 */
qcom,gpu-pwrlevel@10 {
reg = <10>;
qcom,gpu-freq = <342000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D1>;
qcom,bus-freq = <3>;
qcom,bus-min = <2>;
qcom,bus-max = <3>;
qcom,acd-level = <ACD_LEVEL_LOW_SVS_D1>;
};
/* Low_SVS_D2 */
qcom,gpu-pwrlevel@11 {
reg = <11>;
qcom,gpu-freq = <222000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D2>;
qcom,bus-freq = <3>;
qcom,bus-min = <2>;
qcom,bus-max = <3>;
qcom,acd-level = <ACD_LEVEL_LOW_SVS_D2>;
};
/* Low_SVS_D3 */
qcom,gpu-pwrlevel@12 {
reg = <12>;
qcom,gpu-freq = <160000000>;
qcom,level = <RPMH_REGULATOR_LEVEL_LOW_SVS_D3>;
qcom,bus-freq = <2>;
qcom,bus-min = <2>;
qcom,bus-max = <2>;
};
};
qcom,gpu-pwrlevels-2 {
#address-cells = <1>;
#size-cells = <0>;
qcom,initial-pwrlevel = <12>;
qcom,initial-min-pwrlevel = <12>;
qcom,sku-codes = <SKU_CODE(PCODE_UNKNOWN, FC_UNKNOWN)>;