diff --git a/qcom/kera.dtsi b/qcom/kera.dtsi
index 24c3c6da..e81631e2 100644
--- a/qcom/kera.dtsi
+++ b/qcom/kera.dtsi
@@ -1845,8 +1845,17 @@
 	};
 
 	gpucc: clock-controller@3d90000 {
-		compatible = "qcom,dummycc";
-		clock-output-names = "gpucc_clocks";
+		compatible = "qcom,kera-gpucc", "syscon";
+		reg = <0x3d90000 0xa000>;
+		reg-name = "cc_base";
+		vdd_cx-supply = <&VDD_CX_LEVEL>;
+		vdd_mx-supply = <&VDD_MX_LEVEL>;
+		clocks = <&rpmhcc RPMH_CXO_CLK>,
+			 <&gcc GCC_GPU_GPLL0_CPH_CLK_SRC>,
+			 <&gcc GCC_GPU_GPLL0_DIV_CPH_CLK_SRC>;
+		clock-names = "bi_tcxo",
+			      "gpll0_out_main",
+			      "gpll0_out_main_div";
 		#clock-cells = <1>;
 		#reset-cells = <1>;
 	};
@@ -3079,26 +3088,32 @@
 #include "ipcc-test-no-slpi.dtsi"
 
 &cam_cc_ipe_0_gdsc {
+	clocks = <&gcc GCC_CAMERA_AHB_CLK>;
 	status = "ok";
 };
 
 &cam_cc_ofe_gdsc {
+	clocks = <&gcc GCC_CAMERA_AHB_CLK>;
 	status = "ok";
 };
 
 &cam_cc_tfe_0_gdsc {
+	clocks = <&gcc GCC_CAMERA_AHB_CLK>;
 	status = "ok";
 };
 
 &cam_cc_tfe_1_gdsc {
+	clocks = <&gcc GCC_CAMERA_AHB_CLK>;
 	status = "ok";
 };
 
 &cam_cc_tfe_2_gdsc {
+	clocks = <&gcc GCC_CAMERA_AHB_CLK>;
 	status = "ok";
 };
 
 &cam_cc_titan_top_gdsc {
+	clocks = <&gcc GCC_CAMERA_AHB_CLK>;
 	interconnects = <&mmss_noc MASTER_CAMNOC_HF &mmss_noc SLAVE_MNOC_HF_MEM_NOC>;
 	interconnect-names = "mmnoc";
 	parent-supply = <&VDD_CX_LEVEL>;
@@ -3106,11 +3121,13 @@
 };
 
 &disp_cc_mdss_core_gdsc {
+	clocks = <&gcc GCC_DISP_AHB_CLK>;
 	parent-supply = <&VDD_CX_LEVEL>;
 	status = "ok";
 };
 
 &disp_cc_mdss_core_int2_gdsc {
+	clocks = <&gcc GCC_DISP_AHB_CLK>;
 	parent-supply = <&VDD_CX_LEVEL>;
 	status = "ok";
 };
@@ -3160,13 +3177,17 @@
 };
 
 &gpu_cc_cx_gdsc {
-	compatible = "regulator-fixed";
 	reg = <0x3d99110 0x4>;
+	parent-supply = <&VDD_CX_LEVEL>;
+	clocks = <&gcc GCC_GPU_CFG_AHB_CLK>;
+	clock-names = "ahb_clk";
 	status = "ok";
 };
 
 &gpu_cc_gx_gdsc {
-	compatible = "regulator-fixed";
+	parent-supply = <&VDD_GFX_LEVEL>;
+	clocks = <&gcc GCC_GPU_CFG_AHB_CLK>;
+	clock-names = "ahb_clk";
 	status = "ok";
 };