From fdf5b9c6bd4bb0db5abee2274bb8a97f6f44fc7d Mon Sep 17 00:00:00 2001 From: Priyansh Jain Date: Thu, 23 Jan 2025 09:47:20 +0530 Subject: [PATCH] ARM: dts: qcom: Update gpu mitigation level and BCL threshold for tuna Update gpu mitigation level for tuna and BCL threshold based on latest recommendation. Change-Id: I51e9e60d6439439ce76fa4cfbdf7e4d909ef727e Signed-off-by: Priyansh Jain --- qcom/tuna-pm7550ba.dtsi | 19 ++++++++++++++++++- qcom/tuna-pmih010x.dtsi | 6 +++--- qcom/tuna-pmiv0108.dtsi | 19 ++++++++++++++++++- qcom/tuna-thermal.dtsi | 12 ++++++------ 4 files changed, 45 insertions(+), 11 deletions(-) diff --git a/qcom/tuna-pm7550ba.dtsi b/qcom/tuna-pm7550ba.dtsi index 0a21d8d1..0b022060 100644 --- a/qcom/tuna-pm7550ba.dtsi +++ b/qcom/tuna-pm7550ba.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "pm7550ba.dtsi" @@ -231,6 +231,23 @@ }; &thermal_zones { + pm7550ba-ibat-lvl0 { + trips { + ibat-lvl0 { + temperature = <10000>; + + }; + }; + }; + + pm7550ba-ibat-lvl1 { + trips { + ibat-lvl1 { + temperature = <11500>; + }; + }; + }; + pm7550ba-2s-ibat-lvl0 { polling-delay-passive = <0>; polling-delay = <0>; diff --git a/qcom/tuna-pmih010x.dtsi b/qcom/tuna-pmih010x.dtsi index a82a7e84..e9465597 100644 --- a/qcom/tuna-pmih010x.dtsi +++ b/qcom/tuna-pmih010x.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include "pmih010x.dtsi" @@ -211,7 +211,7 @@ pmih010x-ibat-lvl0 { trips { ibat-lvl0 { - temperature = <7000>; + temperature = <10000>; }; }; }; @@ -219,7 +219,7 @@ pmih010x-ibat-lvl1 { trips { ibat-lvl1 { - temperature = <9000>; + temperature = <11500>; }; }; }; diff --git a/qcom/tuna-pmiv0108.dtsi b/qcom/tuna-pmiv0108.dtsi index 1cfe6696..921bf780 100644 --- a/qcom/tuna-pmiv0108.dtsi +++ b/qcom/tuna-pmiv0108.dtsi @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -146,6 +146,23 @@ }; &thermal_zones { + pmiv010x-ibat-lvl0 { + trips { + ibat-lvl0 { + temperature = <10000>; + + }; + }; + }; + + pmiv010x-ibat-lvl1 { + trips { + ibat-lvl1 { + temperature = <11500>; + }; + }; + }; + sys-therm-7 { polling-delay-passive = <0>; polling-delay = <0>; diff --git a/qcom/tuna-thermal.dtsi b/qcom/tuna-thermal.dtsi index 1a844d48..29406413 100644 --- a/qcom/tuna-thermal.dtsi +++ b/qcom/tuna-thermal.dtsi @@ -1244,7 +1244,7 @@ cooling-maps { gpu0_cdev { trip = <&gpu0_tj_cfg>; - cooling-device = <&msm_gpu 0 THERMAL_NO_LIMIT>; + cooling-device = <&msm_gpu 0 6>; }; }; }; @@ -1283,7 +1283,7 @@ cooling-maps { gpu1_cdev { trip = <&gpu1_tj_cfg>; - cooling-device = <&msm_gpu 0 THERMAL_NO_LIMIT>; + cooling-device = <&msm_gpu 0 6>; }; }; }; @@ -1322,7 +1322,7 @@ cooling-maps { gpu2_cdev { trip = <&gpu2_tj_cfg>; - cooling-device = <&msm_gpu 0 THERMAL_NO_LIMIT>; + cooling-device = <&msm_gpu 0 6>; }; }; }; @@ -1361,7 +1361,7 @@ cooling-maps { gpu3_cdev { trip = <&gpu3_tj_cfg>; - cooling-device = <&msm_gpu 0 THERMAL_NO_LIMIT>; + cooling-device = <&msm_gpu 0 6>; }; }; }; @@ -1400,7 +1400,7 @@ cooling-maps { gpu4_cdev { trip = <&gpu4_tj_cfg>; - cooling-device = <&msm_gpu 0 THERMAL_NO_LIMIT>; + cooling-device = <&msm_gpu 0 6>; }; }; }; @@ -1439,7 +1439,7 @@ cooling-maps { gpu5_cdev { trip = <&gpu5_tj_cfg>; - cooling-device = <&msm_gpu 0 THERMAL_NO_LIMIT>; + cooling-device = <&msm_gpu 0 6>; }; }; };