diff --git a/qcom/tuna.dtsi b/qcom/tuna.dtsi
index b7a1524e..acaa6248 100644
--- a/qcom/tuna.dtsi
+++ b/qcom/tuna.dtsi
@@ -1103,9 +1103,26 @@
 		#reset-cells = <1>;
 	};
 
+	dispcc_crm: syscon@af27800 {
+		compatible = "syscon";
+		reg = <0xaf27800 0x2000>;
+	};
+
 	dispcc: clock-controller@af00000 {
-		compatible = "qcom,dummycc";
-		clock-output-names = "dispcc_clocks";
+		compatible = "qcom,tuna-dispcc", "syscon";
+		reg = <0xaf00000 0x20000>;
+		reg-name = "cc_base";
+		vdd_mm-supply = <&VDD_MM_LEVEL>;
+		vdd_mx-supply = <&VDD_MX_LEVEL>;
+		clocks = <&rpmhcc RPMH_CXO_CLK>,
+			 <&rpmhcc RPMH_CXO_CLK_A>,
+			 <&sleep_clk>,
+			 <&gcc GCC_DISP_AHB_CLK>;
+		clock-names = "bi_tcxo",
+			      "bi_tcxo_ao",
+			      "sleep_clk",
+			      "iface";
+		qcom,dispcc_crm-crmc = <&dispcc_crm>;
 		#clock-cells = <1>;
 		#reset-cells = <1>;
 	};
@@ -1719,12 +1736,14 @@
 };
 
 &disp_cc_mdss_core_gdsc {
-	compatible = "regulator-fixed";
+	clocks = <&gcc GCC_DISP_AHB_CLK>;
+	parent-supply = <&VDD_MM_LEVEL>;
 	status = "ok";
 };
 
 &disp_cc_mdss_core_int2_gdsc {
-	compatible = "regulator-fixed";
+	clocks = <&gcc GCC_DISP_AHB_CLK>;
+	parent-supply = <&VDD_MM_LEVEL>;
 	status = "ok";
 };