diff --git a/qcom/sun-mtp.dtsi b/qcom/sun-mtp.dtsi index 0ad10562..73020792 100644 --- a/qcom/sun-mtp.dtsi +++ b/qcom/sun-mtp.dtsi @@ -29,6 +29,67 @@ }; }; +&pmic_glink_adc { + status = "ok"; + + smb1501_1_iin { + reg = <0x1066801>; + label = "smb1501_1_iin"; + }; + + smb1501_1_ichg { + reg = <0x1066802>; + label = "smb1501_1_ichg"; + }; + + smb1501_1_die_temp { + reg = <0x1066803>; + label = "smb1501_1_die_temp"; + }; + + smb1501_2_iin { + reg = <0x1066901>; + label = "smb1501_2_iin"; + }; + + smb1501_2_ichg { + reg = <0x1066902>; + label = "smb1501_2_ichg"; + }; + + smb1501_2_die_temp { + reg = <0x1066903>; + label = "smb1501_2_die_temp"; + }; +}; + +&pmic_glink_debug { + i2c@106 { + reg = <0x106>; /* I2C instance 6 in ADSP for SE5 */ + #address-cells = <1>; + #size-cells = <0>; + qcom,bus-type = "i2c"; + + qcom,smb1501@68 { + compatible = "qcom,i2c-pmic"; + reg = <0x68>; + qcom,can-sleep; + }; + + qcom,smb1501@69 { + compatible = "qcom,i2c-pmic"; + reg = <0x69>; + qcom,can-sleep; + }; + + qcom,idt9418@3b { + compatible = "qcom,i2c-pmic"; + reg = <0x3b>; + qcom,can-sleep; + }; + }; +}; + ®ulator_ocp_notifier { periph-1c1-supply = <&L1B>; periph-1c2-supply = <&L2B>; diff --git a/qcom/sun-qrd-sku1.dtsi b/qcom/sun-qrd-sku1.dtsi index 69a76e8d..ebbc3714 100644 --- a/qcom/sun-qrd-sku1.dtsi +++ b/qcom/sun-qrd-sku1.dtsi @@ -3,4 +3,81 @@ * Copyright (c) 2023 Qualcomm Innovation Center, Inc. All rights reserved. */ +#include + #include "sun-qrd.dtsi" + +&pmic_glink_adc { + status = "ok"; + + smb1396_1_iin { + reg = <0x1063401>; + label = "smb1396_1_iin"; + }; + + smb1396_1_ichg { + reg = <0x1063402>; + label = "smb1396_1_ichg"; + }; + + smb1396_1_die_temp { + reg = <0x1063403>; + label = "smb1396_1_die_temp"; + }; + + smb1396_2_iin { + reg = <0x1063501>; + label = "smb1396_2_iin"; + }; + + smb1396_2_ichg { + reg = <0x1063502>; + label = "smb1396_2_ichg"; + }; + + smb1396_2_die_temp { + reg = <0x1063503>; + label = "smb1396_2_die_temp"; + }; +}; + +&pmic_glink_debug { + i2c@106 { + reg = <0x106>; /* I2C instance 6 in ADSP for SE5 */ + #address-cells = <1>; + #size-cells = <0>; + qcom,bus-type = "i2c"; + + qcom,smb1396@34 { + compatible = "qcom,i2c-pmic"; + reg = <0x34>; + qcom,can-sleep; + }; + + qcom,smb1396@35 { + compatible = "qcom,i2c-pmic"; + reg = <0x35>; + qcom,can-sleep; + }; + + qcom,idt9418@3b { + compatible = "qcom,i2c-pmic"; + reg = <0x3b>; + qcom,can-sleep; + }; + }; + + /* SPMI bridge bus 0 with SMB1510 device */ + spmi@200 { + reg = <0x200>; + #address-cells = <2>; + #size-cells = <0>; + qcom,bus-type = "spmi"; + + qcom,smb1510@d { + compatible = "qcom,spmi-pmic"; + reg = <0xd SPMI_USID>; + qcom,can-sleep; + }; + }; +}; diff --git a/qcom/sun-qrd-sku2.dtsi b/qcom/sun-qrd-sku2.dtsi index 69a76e8d..562b358e 100644 --- a/qcom/sun-qrd-sku2.dtsi +++ b/qcom/sun-qrd-sku2.dtsi @@ -4,3 +4,64 @@ */ #include "sun-qrd.dtsi" + +&pmic_glink_adc { + status = "ok"; + + smb1501_1_iin { + reg = <0x1066801>; + label = "smb1501_1_iin"; + }; + + smb1501_1_ichg { + reg = <0x1066802>; + label = "smb1501_1_ichg"; + }; + + smb1501_1_die_temp { + reg = <0x1066803>; + label = "smb1501_1_die_temp"; + }; + + smb1501_2_iin { + reg = <0x1066901>; + label = "smb1501_2_iin"; + }; + + smb1501_2_ichg { + reg = <0x1066902>; + label = "smb1501_2_ichg"; + }; + + smb1501_2_die_temp { + reg = <0x1066903>; + label = "smb1501_2_die_temp"; + }; +}; + +&pmic_glink_debug { + i2c@106 { + reg = <0x106>; /* I2C instance 6 in ADSP for SE5 */ + #address-cells = <1>; + #size-cells = <0>; + qcom,bus-type = "i2c"; + + qcom,smb1501@68 { + compatible = "qcom,i2c-pmic"; + reg = <0x68>; + qcom,can-sleep; + }; + + qcom,smb1501@69 { + compatible = "qcom,i2c-pmic"; + reg = <0x69>; + qcom,can-sleep; + }; + + qcom,idt9418@3b { + compatible = "qcom,i2c-pmic"; + reg = <0x3b>; + qcom,can-sleep; + }; + }; +}; diff --git a/qcom/sun.dtsi b/qcom/sun.dtsi index ca5af532..1ea84cc1 100644 --- a/qcom/sun.dtsi +++ b/qcom/sun.dtsi @@ -17,6 +17,7 @@ #include #include #include +#include #include #include #include @@ -1874,6 +1875,115 @@ status = "disabled"; }; + spmi0_debug_bus: spmi-debug@10b14000 { + compatible = "qcom,spmi-pmic-arb-debug"; + reg = <0x10b14000 0x60>, <0x221c8784 0x4>; + reg-names = "core", "fuse"; + clocks = <&aoss_qmp>; + clock-names = "core_clk"; + qcom,fuse-enable-bit = <18>; + #address-cells = <2>; + #size-cells = <0>; + depends-on-supply = <&spmi_bus>; + depends-on2-supply = <&pmih010x_glink_debug>; + + pmk8550@0 { + compatible = "qcom,spmi-pmic"; + reg = <0x0 SPMI_USID>; + #address-cells = <2>; + #size-cells = <0>; + qcom,can-sleep; + }; + + pm8550@1 { + compatible = "qcom,spmi-pmic"; + reg = <0x1 SPMI_USID>; + #address-cells = <2>; + #size-cells = <0>; + qcom,can-sleep; + }; + + pm8550ve@3 { + compatible = "qcom,spmi-pmic"; + reg = <0x3 SPMI_USID>; + #address-cells = <2>; + #size-cells = <0>; + qcom,can-sleep; + }; + + pmd802x@4 { + compatible = "qcom,spmi-pmic"; + reg = <0x4 SPMI_USID>; + #address-cells = <2>; + #size-cells = <0>; + qcom,can-sleep; + }; + + pm8550vs@5 { + compatible = "qcom,spmi-pmic"; + reg = <0x5 SPMI_USID>; + #address-cells = <2>; + #size-cells = <0>; + qcom,can-sleep; + }; + + pm8550ve@6 { + compatible = "qcom,spmi-pmic"; + reg = <0x6 SPMI_USID>; + #address-cells = <2>; + #size-cells = <0>; + qcom,can-sleep; + }; + + pmih010x@7 { + compatible = "qcom,spmi-pmic"; + reg = <0x7 SPMI_USID>; + #address-cells = <2>; + #size-cells = <0>; + qcom,can-sleep; + }; + + pm8550ve@8 { + compatible = "qcom,spmi-pmic"; + reg = <0x8 SPMI_USID>; + #address-cells = <2>; + #size-cells = <0>; + qcom,can-sleep; + }; + + pm8550vs@9 { + compatible = "qcom,spmi-pmic"; + reg = <0x9 SPMI_USID>; + #address-cells = <2>; + #size-cells = <0>; + qcom,can-sleep; + }; + + pmr735d@a { + compatible = "qcom,spmi-pmic"; + reg = <0xa SPMI_USID>; + #address-cells = <2>; + #size-cells = <0>; + qcom,can-sleep; + }; + + pm8010@c { + compatible = "qcom,spmi-pmic"; + reg = <0xc SPMI_USID>; + #address-cells = <2>; + #size-cells = <0>; + qcom,can-sleep; + }; + + pm8010@d { + compatible = "qcom,spmi-pmic"; + reg = <0xd SPMI_USID>; + #address-cells = <2>; + #size-cells = <0>; + qcom,can-sleep; + }; + }; + qcom,msm-adsprpc-mem { compatible = "qcom,msm-adsprpc-mem-region"; memory-region = <&adsp_mem_heap>; @@ -2122,6 +2232,66 @@ }; }; + qcom,pmic_glink { + compatible = "qcom,qti-pmic-glink"; + qcom,pmic-glink-channel = "PMIC_RTR_ADSP_APPS"; + depends-on-supply = <&ipcc_mproc>; + + battery_charger: qcom,battery_charger { + compatible = "qcom,battery-charger"; + }; + + ucsi: qcom,ucsi { + compatible = "qcom,ucsi-glink"; + }; + + altmode: qcom,altmode { + compatible = "qcom,altmode-glink"; + #altmode-cells = <1>; + }; + }; + + qcom,pmic_glink_log { + compatible = "qcom,qti-pmic-glink"; + qcom,pmic-glink-channel = "PMIC_LOGS_ADSP_APPS"; + + qcom,battery_debug { + compatible = "qcom,battery-debug"; + }; + + qcom,charger_ulog_glink { + compatible = "qcom,charger-ulog-glink"; + }; + + pmic_glink_debug: qcom,pmic_glink_debug { + compatible = "qcom,pmic-glink-debug"; + #address-cells = <1>; + #size-cells = <0>; + depends-on-supply = <&spmi_bus>; + + /* Primary SPMI bus */ + spmi@0 { + reg = <0>; + #address-cells = <2>; + #size-cells = <0>; + + pmih010x_glink_debug: qcom,pmih010x-debug@7 { + compatible = "qcom,spmi-pmic"; + reg = <0x7 SPMI_USID>; + qcom,can-sleep; + }; + }; + }; + + pmic_glink_adc: qcom,glink-adc { + compatible = "qcom,glink-adc"; + #address-cells = <1>; + #size-cells = <0>; + #io-channel-cells = <1>; + status = "disabled"; + }; + }; + thermal_zones: thermal-zones { };