ARM: dts: msm: Initial camera sensor dtsi files for Tuna
Initial sensor dtsi files for Tuna MTP/CDP/RCM with: - Peripherals: CCI0/CCI1, - CSIPHY instances: 0 to 4, - Sensors: IMX766/IMX858/JN1 nodes, - ASC sensor: OV32C node, - TPG instances: 1 to 3, - MCLK/RESET GPIO pin controls CRs-Fixed: 3940535. Change-Id: Ie2536cbf26380c152300ce122865d71e86c40a66 Signed-off-by: Shadul Shaikh <quic_shaduls@quicinc.com>
This commit is contained in:
Shadul Shaikh
826
tuna-camera.dtsi
826
tuna-camera.dtsi
@@ -6,6 +6,486 @@
|
||||
#include <dt-bindings/msm-camera.h>
|
||||
#include <dt-bindings/arm/msm/qti-smmu-proxy-dt-ids.h>
|
||||
|
||||
&tlmm {
|
||||
cci_i2c_sda0_active: cci_i2c_sda0_active {
|
||||
mux {
|
||||
/* CLK, DATA */
|
||||
pins = "gpio70";
|
||||
function = "cci_i2c_sda0";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio70";
|
||||
bias-pull-up; /* PULL UP*/
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
qcom,i2c_pull;
|
||||
};
|
||||
};
|
||||
|
||||
cci_i2c_sda0_suspend: cci_i2c_sda0_suspend {
|
||||
mux {
|
||||
/* CLK, DATA */
|
||||
pins = "gpio70";
|
||||
function = "cci_i2c_sda0";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio70";
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
};
|
||||
};
|
||||
|
||||
cci_i2c_scl0_active: cci_i2c_scl0_active {
|
||||
mux {
|
||||
/* CLK, DATA */
|
||||
pins = "gpio71";
|
||||
function = "cci_i2c_scl0";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio71";
|
||||
bias-pull-up; /* PULL UP*/
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
qcom,i2c_pull;
|
||||
};
|
||||
};
|
||||
|
||||
cci_i2c_scl0_suspend: cci_i2c_scl0_suspend {
|
||||
mux {
|
||||
/* CLK, DATA */
|
||||
pins = "gpio71";
|
||||
function = "cci_i2c_scl0";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio71";
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
};
|
||||
};
|
||||
|
||||
cci_i2c_sda1_active: cci_i2c_sda1_active {
|
||||
mux {
|
||||
/* CLK, DATA */
|
||||
pins = "gpio72";
|
||||
function = "cci_i2c_sda1";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio72";
|
||||
bias-pull-up; /* PULL UP*/
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
qcom,i2c_pull;
|
||||
};
|
||||
};
|
||||
|
||||
cci_i2c_sda1_suspend: cci_i2c_sda1_suspend {
|
||||
mux {
|
||||
/* CLK, DATA */
|
||||
pins = "gpio72";
|
||||
function = "cci_i2c_sda1";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio72";
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
};
|
||||
};
|
||||
|
||||
cci_i2c_scl1_active: cci_i2c_scl1_active {
|
||||
mux {
|
||||
/* CLK, DATA */
|
||||
pins = "gpio73";
|
||||
function = "cci_i2c_scl1";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio73";
|
||||
bias-pull-up; /* PULL UP*/
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
qcom,i2c_pull;
|
||||
};
|
||||
};
|
||||
|
||||
cci_i2c_scl1_suspend: cci_i2c_scl1_suspend {
|
||||
mux {
|
||||
/* CLK, DATA */
|
||||
pins = "gpio73";
|
||||
function = "cci_i2c_scl1";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio73";
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
};
|
||||
};
|
||||
|
||||
cci_i2c_sda2_active: cci_i2c_sda2_active {
|
||||
mux {
|
||||
/* CLK, DATA */
|
||||
pins = "gpio74";
|
||||
function = "cci_i2c_sda2";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio74";
|
||||
bias-pull-up; /* PULL UP*/
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
qcom,i2c_pull;
|
||||
};
|
||||
};
|
||||
|
||||
cci_i2c_sda2_suspend: cci_i2c_sda2_suspend {
|
||||
mux {
|
||||
/* CLK, DATA */
|
||||
pins = "gpio74";
|
||||
function = "cci_i2c_sda2";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio74";
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
};
|
||||
};
|
||||
|
||||
cci_i2c_scl2_active: cci_i2c_scl2_active {
|
||||
mux {
|
||||
/* CLK, DATA */
|
||||
pins = "gpio75";
|
||||
function = "cci_i2c_scl2";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio75";
|
||||
bias-pull-up; /* PULL UP*/
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
qcom,i2c_pull;
|
||||
};
|
||||
};
|
||||
|
||||
cci_i2c_scl2_suspend: cci_i2c_scl2_suspend {
|
||||
mux {
|
||||
/* CLK, DATA */
|
||||
pins = "gpio75";
|
||||
function = "cci_i2c_scl2";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio75";
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
};
|
||||
};
|
||||
|
||||
cci_i2c_sda3_active: cci_i2c_sda3_active {
|
||||
mux {
|
||||
pins = "gpio20";
|
||||
function = "cci_i2c_sda3";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio20";
|
||||
bias-pull-up; /* PULL UP*/
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
qcom,i2c_pull;
|
||||
};
|
||||
};
|
||||
|
||||
cci_i2c_sda3_suspend: cci_i2c_sda3_suspend {
|
||||
mux {
|
||||
pins = "gpio20";
|
||||
function = "cci_i2c_sda3";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio20";
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
};
|
||||
};
|
||||
|
||||
cci_i2c_scl3_active: cci_i2c_scl3_active {
|
||||
mux {
|
||||
pins = "gpio21";
|
||||
function = "cci_i2c_scl3";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio21";
|
||||
bias-pull-up; /* PULL UP*/
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
qcom,i2c_pull;
|
||||
};
|
||||
};
|
||||
|
||||
cci_i2c_scl3_suspend: cci_i2c_scl3_suspend {
|
||||
mux {
|
||||
pins = "gpio21";
|
||||
function = "cci_i2c_scl3";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio21";
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
};
|
||||
};
|
||||
|
||||
cam_sensor_mclk0_active: cam_sensor_mclk0_active {
|
||||
/* MCLK0 */
|
||||
mux {
|
||||
pins = "gpio64";
|
||||
function = "cam_mclk";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio64";
|
||||
bias-disable; /* No PULL */
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
};
|
||||
};
|
||||
|
||||
cam_sensor_mclk0_suspend: cam_sensor_mclk0_suspend {
|
||||
/* MCLK0 */
|
||||
mux {
|
||||
pins = "gpio64";
|
||||
function = "cam_mclk";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio64";
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
};
|
||||
};
|
||||
|
||||
cam_sensor_mclk1_active: cam_sensor_mclk1_active {
|
||||
/* MCLK1 */
|
||||
mux {
|
||||
pins = "gpio65";
|
||||
function = "cam_mclk";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio65";
|
||||
bias-disable; /* No PULL */
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
};
|
||||
};
|
||||
|
||||
cam_sensor_mclk1_suspend: cam_sensor_mclk1_suspend {
|
||||
/* MCLK1 */
|
||||
mux {
|
||||
pins = "gpio65";
|
||||
function = "cam_mclk";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio65";
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
};
|
||||
};
|
||||
|
||||
cam_sensor_mclk2_active: cam_sensor_mclk2_active {
|
||||
/* MCLK2 */
|
||||
mux {
|
||||
pins = "gpio66";
|
||||
function = "cam_mclk";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio66";
|
||||
bias-disable; /* No PULL */
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
};
|
||||
};
|
||||
|
||||
cam_sensor_mclk2_suspend: cam_sensor_mclk2_suspend {
|
||||
/* MCLK2 */
|
||||
mux {
|
||||
pins = "gpio66";
|
||||
function = "cam_mclk";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio66";
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
};
|
||||
};
|
||||
|
||||
cam_sensor_mclk3_active: cam_sensor_mclk3_active {
|
||||
/* MCLK3 */
|
||||
mux {
|
||||
pins = "gpio67";
|
||||
function = "cam_mclk";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio67";
|
||||
bias-disable; /* No PULL */
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
};
|
||||
};
|
||||
|
||||
cam_sensor_mclk3_suspend: cam_sensor_mclk3_suspend {
|
||||
/* MCLK3 */
|
||||
mux {
|
||||
pins = "gpio67";
|
||||
function = "cam_mclk";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio67";
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
};
|
||||
};
|
||||
|
||||
cam_sensor_mclk4_active: cam_sensor_mclk4_active {
|
||||
/* MCLK4 */
|
||||
mux {
|
||||
pins = "gpio68";
|
||||
function = "cam_asc_mclk4";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio68";
|
||||
bias-disable; /* No PULL */
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
};
|
||||
};
|
||||
|
||||
cam_sensor_mclk4_suspend: cam_sensor_mclk4_suspend {
|
||||
/* MCLK4 */
|
||||
mux {
|
||||
pins = "gpio68";
|
||||
function = "cam_asc_mclk4";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio68";
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
};
|
||||
};
|
||||
|
||||
cam_sensor_active_rst0: cam_sensor_active_rst0 {
|
||||
mux {
|
||||
pins = "gpio37";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio37";
|
||||
bias-disable; /* No PULL */
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
};
|
||||
};
|
||||
|
||||
cam_sensor_suspend_rst0: cam_sensor_suspend_rst0 {
|
||||
mux {
|
||||
pins = "gpio37";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio37";
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
output-low;
|
||||
};
|
||||
};
|
||||
|
||||
cam_sensor_active_rst1: cam_sensor_active_rst1 {
|
||||
mux {
|
||||
pins = "gpio28";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio28";
|
||||
bias-disable; /* No PULL */
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
};
|
||||
};
|
||||
|
||||
cam_sensor_suspend_rst1: cam_sensor_suspend_rst1 {
|
||||
mux {
|
||||
pins = "gpio28";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio28";
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
output-low;
|
||||
};
|
||||
};
|
||||
|
||||
cam_sensor_active_rst2: cam_sensor_active_rst2 {
|
||||
mux {
|
||||
pins = "gpio180";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio180";
|
||||
bias-disable; /* No PULL */
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
};
|
||||
};
|
||||
|
||||
cam_sensor_suspend_rst2: cam_sensor_suspend_rst2 {
|
||||
mux {
|
||||
pins = "gpio180";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio180";
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
output-low;
|
||||
};
|
||||
};
|
||||
|
||||
cam_sensor_active_rst3: cam_sensor_active_rst3 {
|
||||
mux {
|
||||
pins = "gpio3";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio3";
|
||||
bias-disable; /* No PULL */
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
qcom,apps;
|
||||
};
|
||||
};
|
||||
|
||||
cam_sensor_suspend_rst3: cam_sensor_suspend_rst3 {
|
||||
mux {
|
||||
pins = "gpio3";
|
||||
function = "gpio";
|
||||
};
|
||||
|
||||
config {
|
||||
pins = "gpio3";
|
||||
bias-pull-down; /* PULL DOWN */
|
||||
drive-strength = <2>; /* 2 MA */
|
||||
output-low;
|
||||
qcom,remote;
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&soc {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <1>;
|
||||
@@ -21,6 +501,352 @@
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
cam_csiphy0: qcom,csiphy0@ada9000 {
|
||||
cell-index = <0>;
|
||||
compatible = "qcom,csiphy-v2.2.1", "qcom,csiphy";
|
||||
reg = <0x0ada9000 0x2000>;
|
||||
reg-names = "csiphy";
|
||||
reg-cam-base = <0x1a9000>;
|
||||
interrupt-names = "CSIPHY0";
|
||||
interrupts = <GIC_SPI 477 IRQ_TYPE_EDGE_RISING>;
|
||||
regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9";
|
||||
gdscr-supply = <&cam_cc_titan_top_gdsc>;
|
||||
csi-vdd-1p2-supply = <&L4B>;
|
||||
csi-vdd-0p9-supply = <&L2B>;
|
||||
rgltr-cntrl-support;
|
||||
rgltr-min-voltage = <0 1200000 880000>;
|
||||
rgltr-max-voltage = <0 1200000 950000>;
|
||||
rgltr-load-current = <0 7810 81600>;
|
||||
shared-clks = <1 0 0 0>;
|
||||
clock-names = "cphy_rx_clk_src",
|
||||
"csiphy0_clk",
|
||||
"csi0phytimer_clk_src",
|
||||
"csi0phytimer_clk";
|
||||
clocks = <&camcc CAM_CC_CPHY_RX_CLK_SRC>,
|
||||
<&camcc CAM_CC_CSIPHY0_CLK>,
|
||||
<&camcc CAM_CC_CSI0PHYTIMER_CLK_SRC>,
|
||||
<&camcc CAM_CC_CSI0PHYTIMER_CLK>;
|
||||
src-clock-name = "cphy_rx_clk_src";
|
||||
clock-cntl-level = "lowsvsd1", "lowsvs", "nominal";
|
||||
clock-rates =
|
||||
<266666667 0 400000000 0>,
|
||||
<400000000 0 400000000 0>,
|
||||
<480000000 0 400000000 0>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
cam_csiphy1: qcom,csiphy1@adab000 {
|
||||
cell-index = <1>;
|
||||
compatible = "qcom,csiphy-v2.2.1", "qcom,csiphy";
|
||||
reg = <0x0adab000 0x2000>;
|
||||
reg-names = "csiphy";
|
||||
reg-cam-base = <0x1ab000>;
|
||||
interrupt-names = "CSIPHY1";
|
||||
interrupts = <GIC_SPI 478 IRQ_TYPE_EDGE_RISING>;
|
||||
regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9";
|
||||
gdscr-supply = <&cam_cc_titan_top_gdsc>;
|
||||
csi-vdd-1p2-supply = <&L4B>;
|
||||
csi-vdd-0p9-supply = <&L2B>;
|
||||
rgltr-cntrl-support;
|
||||
rgltr-min-voltage = <0 1200000 880000>;
|
||||
rgltr-max-voltage = <0 1200000 950000>;
|
||||
rgltr-load-current = <0 7810 81600>;
|
||||
shared-clks = <1 0 0 0>;
|
||||
clock-names = "cphy_rx_clk_src",
|
||||
"csiphy1_clk",
|
||||
"csi1phytimer_clk_src",
|
||||
"csi1phytimer_clk";
|
||||
clocks = <&camcc CAM_CC_CPHY_RX_CLK_SRC>,
|
||||
<&camcc CAM_CC_CSIPHY1_CLK>,
|
||||
<&camcc CAM_CC_CSI1PHYTIMER_CLK_SRC>,
|
||||
<&camcc CAM_CC_CSI1PHYTIMER_CLK>;
|
||||
src-clock-name = "cphy_rx_clk_src";
|
||||
clock-cntl-level = "lowsvsd1", "lowsvs", "nominal";
|
||||
clock-rates =
|
||||
<266666667 0 400000000 0>,
|
||||
<400000000 0 400000000 0>,
|
||||
<480000000 0 400000000 0>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
cam_csiphy2: qcom,csiphy2@adad000 {
|
||||
cell-index = <2>;
|
||||
compatible = "qcom,csiphy-v2.2.1", "qcom,csiphy";
|
||||
reg = <0x0adad000 0x2000>;
|
||||
reg-names = "csiphy";
|
||||
reg-cam-base = <0x1ad000>;
|
||||
interrupt-names = "CSIPHY2";
|
||||
interrupts = <GIC_SPI 479 IRQ_TYPE_EDGE_RISING>;
|
||||
regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9";
|
||||
gdscr-supply = <&cam_cc_titan_top_gdsc>;
|
||||
csi-vdd-1p2-supply = <&L4B>;
|
||||
csi-vdd-0p9-supply = <&L2B>;
|
||||
rgltr-cntrl-support;
|
||||
rgltr-min-voltage = <0 1200000 880000>;
|
||||
rgltr-max-voltage = <0 1200000 950000>;
|
||||
rgltr-load-current = <0 7810 81600>;
|
||||
shared-clks = <1 0 0 0>;
|
||||
clock-names = "cphy_rx_clk_src",
|
||||
"csiphy2_clk",
|
||||
"csi2phytimer_clk_src",
|
||||
"csi2phytimer_clk";
|
||||
clocks = <&camcc CAM_CC_CPHY_RX_CLK_SRC>,
|
||||
<&camcc CAM_CC_CSIPHY2_CLK>,
|
||||
<&camcc CAM_CC_CSI2PHYTIMER_CLK_SRC>,
|
||||
<&camcc CAM_CC_CSI2PHYTIMER_CLK>;
|
||||
src-clock-name = "cphy_rx_clk_src";
|
||||
clock-cntl-level = "lowsvsd1", "lowsvs", "nominal";
|
||||
clock-rates =
|
||||
<266666667 0 400000000 0>,
|
||||
<400000000 0 400000000 0>,
|
||||
<480000000 0 400000000 0>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
cam_csiphy3: qcom,csiphy3@adaf000 {
|
||||
cell-index = <3>;
|
||||
compatible = "qcom,csiphy-v2.2.1", "qcom,csiphy";
|
||||
reg = <0x0adaf000 0x2000>;
|
||||
reg-names = "csiphy";
|
||||
reg-cam-base = <0x1af000>;
|
||||
interrupt-names = "CSIPHY3";
|
||||
interrupts = <GIC_SPI 448 IRQ_TYPE_EDGE_RISING>;
|
||||
regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9";
|
||||
gdscr-supply = <&cam_cc_titan_top_gdsc>;
|
||||
csi-vdd-1p2-supply = <&L4B>;
|
||||
csi-vdd-0p9-supply = <&L2B>;
|
||||
rgltr-cntrl-support;
|
||||
rgltr-min-voltage = <0 1200000 880000>;
|
||||
rgltr-max-voltage = <0 1200000 950000>;
|
||||
rgltr-load-current = <0 7810 81600>;
|
||||
shared-clks = <1 0 0 0>;
|
||||
clock-names = "cphy_rx_clk_src",
|
||||
"csiphy3_clk",
|
||||
"csi3phytimer_clk_src",
|
||||
"csi3phytimer_clk";
|
||||
clocks = <&camcc CAM_CC_CPHY_RX_CLK_SRC>,
|
||||
<&camcc CAM_CC_CSIPHY3_CLK>,
|
||||
<&camcc CAM_CC_CSI3PHYTIMER_CLK_SRC>,
|
||||
<&camcc CAM_CC_CSI3PHYTIMER_CLK>;
|
||||
src-clock-name = "cphy_rx_clk_src";
|
||||
clock-cntl-level = "lowsvsd1", "lowsvs", "nominal";
|
||||
clock-rates =
|
||||
<266666667 0 400000000 0>,
|
||||
<400000000 0 400000000 0>,
|
||||
<480000000 0 400000000 0>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
cam_csiphy4: qcom,csiphy4@adb1000 {
|
||||
cell-index = <4>;
|
||||
compatible = "qcom,csiphy-v2.2.1", "qcom,csiphy";
|
||||
reg = <0x0adb1000 0x2000>;
|
||||
reg-names = "csiphy";
|
||||
reg-cam-base = <0x1b1000>;
|
||||
interrupt-names = "CSIPHY4";
|
||||
interrupts = <GIC_SPI 122 IRQ_TYPE_EDGE_RISING>;
|
||||
regulator-names = "gdscr", "csi-vdd-1p2", "csi-vdd-0p9";
|
||||
gdscr-supply = <&cam_cc_titan_top_gdsc>;
|
||||
csi-vdd-1p2-supply = <&L4B>;
|
||||
csi-vdd-0p9-supply = <&L2B>;
|
||||
rgltr-cntrl-support;
|
||||
rgltr-min-voltage = <0 1200000 880000>;
|
||||
rgltr-max-voltage = <0 1200000 950000>;
|
||||
rgltr-load-current = <0 7810 81600>;
|
||||
shared-clks = <1 0 0 0>;
|
||||
clock-names = "cphy_rx_clk_src",
|
||||
"csiphy4_clk",
|
||||
"csi4phytimer_clk_src",
|
||||
"csi4phytimer_clk";
|
||||
clocks = <&camcc CAM_CC_CPHY_RX_CLK_SRC>,
|
||||
<&camcc CAM_CC_CSIPHY4_CLK>,
|
||||
<&camcc CAM_CC_CSI4PHYTIMER_CLK_SRC>,
|
||||
<&camcc CAM_CC_CSI4PHYTIMER_CLK>;
|
||||
src-clock-name = "cphy_rx_clk_src";
|
||||
clock-cntl-level = "lowsvsd1", "lowsvs", "nominal";
|
||||
clock-rates =
|
||||
<266666667 0 400000000 0>,
|
||||
<400000000 0 400000000 0>,
|
||||
<480000000 0 400000000 0>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
cam_cci0: qcom,cci0@ac7b000 {
|
||||
cell-index = <0>;
|
||||
compatible = "qcom,cci", "simple-bus";
|
||||
reg = <0x0ac7b000 0x1000>;
|
||||
reg-names = "cci";
|
||||
reg-cam-base = <0x7b000>;
|
||||
interrupt-names = "CCI0";
|
||||
interrupts = <GIC_SPI 426 IRQ_TYPE_EDGE_RISING>;
|
||||
regulator-names = "gdscr";
|
||||
gdscr-supply = <&cam_cc_titan_top_gdsc>;
|
||||
clock-names = "cci_0_clk_src",
|
||||
"cci_0_clk";
|
||||
clocks = <&camcc CAM_CC_CCI_0_CLK_SRC>,
|
||||
<&camcc CAM_CC_CCI_0_CLK>;
|
||||
clock-rates = <37500000 0>, <37500000 0>;
|
||||
clock-cntl-level = "lowsvsd1", "lowsvs";
|
||||
src-clock-name = "cci_0_clk_src";
|
||||
pctrl-idx-mapping = <CCI_MASTER_0 CCI_MASTER_1>;
|
||||
pctrl-map-names = "m0", "m1";
|
||||
pinctrl-names = "m0_active", "m0_suspend",
|
||||
"m1_active", "m1_suspend";
|
||||
pinctrl-0 = <&cci_i2c_scl0_active &cci_i2c_sda0_active>;
|
||||
pinctrl-1 = <&cci_i2c_scl0_suspend &cci_i2c_sda0_suspend>;
|
||||
pinctrl-2 = <&cci_i2c_scl1_active &cci_i2c_sda1_active>;
|
||||
pinctrl-3 = <&cci_i2c_scl1_suspend &cci_i2c_sda1_suspend>;
|
||||
status = "ok";
|
||||
|
||||
i2c_freq_100Khz_cci0: qcom,i2c_standard_mode {
|
||||
hw-thigh = <201>;
|
||||
hw-tlow = <174>;
|
||||
hw-tsu-sto = <204>;
|
||||
hw-tsu-sta = <231>;
|
||||
hw-thd-dat = <22>;
|
||||
hw-thd-sta = <162>;
|
||||
hw-tbuf = <227>;
|
||||
hw-scl-stretch-en = <0>;
|
||||
hw-trdhld = <6>;
|
||||
hw-tsp = <3>;
|
||||
cci-clk-src = <37500000>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
i2c_freq_400Khz_cci0: qcom,i2c_fast_mode {
|
||||
hw-thigh = <38>;
|
||||
hw-tlow = <56>;
|
||||
hw-tsu-sto = <40>;
|
||||
hw-tsu-sta = <40>;
|
||||
hw-thd-dat = <22>;
|
||||
hw-thd-sta = <35>;
|
||||
hw-tbuf = <62>;
|
||||
hw-scl-stretch-en = <0>;
|
||||
hw-trdhld = <6>;
|
||||
hw-tsp = <3>;
|
||||
cci-clk-src = <37500000>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
i2c_freq_custom_cci0: qcom,i2c_custom_mode {
|
||||
hw-thigh = <16>;
|
||||
hw-tlow = <22>;
|
||||
hw-tsu-sto = <17>;
|
||||
hw-tsu-sta = <18>;
|
||||
hw-thd-dat = <16>;
|
||||
hw-thd-sta = <15>;
|
||||
hw-tbuf = <24>;
|
||||
hw-scl-stretch-en = <1>;
|
||||
hw-trdhld = <3>;
|
||||
hw-tsp = <3>;
|
||||
cci-clk-src = <37500000>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
i2c_freq_1Mhz_cci0: qcom,i2c_fast_plus_mode {
|
||||
hw-thigh = <16>;
|
||||
hw-tlow = <22>;
|
||||
hw-tsu-sto = <17>;
|
||||
hw-tsu-sta = <18>;
|
||||
hw-thd-dat = <16>;
|
||||
hw-thd-sta = <15>;
|
||||
hw-tbuf = <24>;
|
||||
hw-scl-stretch-en = <0>;
|
||||
hw-trdhld = <3>;
|
||||
hw-tsp = <3>;
|
||||
cci-clk-src = <37500000>;
|
||||
status = "ok";
|
||||
};
|
||||
};
|
||||
|
||||
cam_cci1: qcom,cci1@ac7c000 {
|
||||
cell-index = <1>;
|
||||
compatible = "qcom,cci", "simple-bus";
|
||||
reg = <0x0ac7c000 0x1000>;
|
||||
reg-names = "cci";
|
||||
reg-cam-base = <0x7c000>;
|
||||
interrupt-names = "CCI1";
|
||||
interrupts = <GIC_SPI 427 IRQ_TYPE_EDGE_RISING>;
|
||||
regulator-names = "gdscr";
|
||||
gdscr-supply = <&cam_cc_titan_top_gdsc>;
|
||||
clock-names = "cci_1_clk_src",
|
||||
"cci_1_clk";
|
||||
clocks = <&camcc CAM_CC_CCI_1_CLK_SRC>,
|
||||
<&camcc CAM_CC_CCI_1_CLK>;
|
||||
clock-rates = <37500000 0>, <37500000 0>;
|
||||
clock-cntl-level = "lowsvsd1", "lowsvs";
|
||||
src-clock-name = "cci_1_clk_src";
|
||||
pctrl-idx-mapping = <CCI_MASTER_0 CCI_MASTER_1>;
|
||||
pctrl-map-names = "m0", "m1";
|
||||
pinctrl-names = "m0_active", "m0_suspend",
|
||||
"m1_active", "m1_suspend";
|
||||
pinctrl-0 = <&cci_i2c_scl2_active &cci_i2c_sda2_active>;
|
||||
pinctrl-1 = <&cci_i2c_scl2_suspend &cci_i2c_sda2_suspend>;
|
||||
pinctrl-2 = <&cci_i2c_scl3_active &cci_i2c_sda3_active>;
|
||||
pinctrl-3 = <&cci_i2c_scl3_suspend &cci_i2c_sda3_suspend>;
|
||||
status = "ok";
|
||||
|
||||
i2c_freq_100Khz_cci1: qcom,i2c_standard_mode {
|
||||
hw-thigh = <201>;
|
||||
hw-tlow = <174>;
|
||||
hw-tsu-sto = <204>;
|
||||
hw-tsu-sta = <231>;
|
||||
hw-thd-dat = <22>;
|
||||
hw-thd-sta = <162>;
|
||||
hw-tbuf = <227>;
|
||||
hw-scl-stretch-en = <0>;
|
||||
hw-trdhld = <6>;
|
||||
hw-tsp = <3>;
|
||||
cci-clk-src = <37500000>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
i2c_freq_400Khz_cci1: qcom,i2c_fast_mode {
|
||||
hw-thigh = <38>;
|
||||
hw-tlow = <56>;
|
||||
hw-tsu-sto = <40>;
|
||||
hw-tsu-sta = <40>;
|
||||
hw-thd-dat = <22>;
|
||||
hw-thd-sta = <35>;
|
||||
hw-tbuf = <62>;
|
||||
hw-scl-stretch-en = <0>;
|
||||
hw-trdhld = <6>;
|
||||
hw-tsp = <3>;
|
||||
cci-clk-src = <37500000>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
i2c_freq_custom_cci1: qcom,i2c_custom_mode {
|
||||
hw-thigh = <16>;
|
||||
hw-tlow = <22>;
|
||||
hw-tsu-sto = <17>;
|
||||
hw-tsu-sta = <18>;
|
||||
hw-thd-dat = <16>;
|
||||
hw-thd-sta = <15>;
|
||||
hw-tbuf = <24>;
|
||||
hw-scl-stretch-en = <1>;
|
||||
hw-trdhld = <3>;
|
||||
hw-tsp = <3>;
|
||||
cci-clk-src = <37500000>;
|
||||
status = "ok";
|
||||
};
|
||||
|
||||
i2c_freq_1Mhz_cci1: qcom,i2c_fast_plus_mode {
|
||||
hw-thigh = <16>;
|
||||
hw-tlow = <22>;
|
||||
hw-tsu-sto = <17>;
|
||||
hw-tsu-sta = <18>;
|
||||
hw-thd-dat = <16>;
|
||||
hw-thd-sta = <15>;
|
||||
hw-tbuf = <24>;
|
||||
hw-scl-stretch-en = <0>;
|
||||
hw-trdhld = <3>;
|
||||
hw-tsp = <3>;
|
||||
cci-clk-src = <37500000>;
|
||||
status = "ok";
|
||||
};
|
||||
};
|
||||
|
||||
qcom,cam_smmu {
|
||||
compatible = "qcom,msm-cam-smmu", "simple-bus";
|
||||
status = "ok";
|
||||
|
||||
Reference in New Issue
Block a user