diff --git a/kera-ipa.dts b/kera-ipa.dts index 9cb5a883..4d1cbed3 100644 --- a/kera-ipa.dts +++ b/kera-ipa.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ /dts-v1/; @@ -11,7 +11,7 @@ #include #include #include -#include "tuna-ipa.dtsi" +#include "kera-ipa.dtsi" / { model = "Qualcomm Technologies, Inc. Kera SoC"; diff --git a/kera-ipa.dtsi b/kera-ipa.dtsi new file mode 100644 index 00000000..abad2dea --- /dev/null +++ b/kera-ipa.dtsi @@ -0,0 +1,51 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2025 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "ipa.dtsi" + +&ipa_hw { + qcom,interconnect,num-cases = <5>; + qcom,interconnect,num-paths = <3>; + + interrupts = + <0 654 IRQ_TYPE_LEVEL_HIGH>, + <0 432 IRQ_TYPE_LEVEL_HIGH>; + + /* Low Latency pipe alloc factor */ + qcom,ipa-gen-rx-ll-pool-sz-factor = <1>; + + qcom,wan-rx-ring-size = <128>; + qcom,ipa-gen-rx-cmn-page-pool-sz-factor = <8>; + qcom,ipa-gen-rx-cmn-temp-pool-sz-factor = <3>; + + interconnects = <&aggre2_noc MASTER_IPA &gem_noc SLAVE_LLCC>, + <&mc_virt MASTER_LLCC &mc_virt SLAVE_EBI1>, + <&gem_noc MASTER_APPSS_PROC &cnoc_main SLAVE_IPA_CFG>; + interconnect-names = "ipa_to_llcc", "llcc_to_ebi1", "appss_to_ipa"; + + qcom,no-vote = + <0 0 0 0 0 0>; + + qcom,svs2 = + <0 0 0 1300000 0 76800>; + + qcom,svs = + <1200000 0 1200000 2800000 0 150000>; + + qcom,nominal = + <2400000 0 2400000 5500000 0 400000>; + + qcom,turbo = + <3600000 0 3600000 5500000 0 400000>; + + qcom,bus-vector-names = "MIN", "SVS2", "SVS", "NOMINAL", + "TURBO"; +}; + +&ipa_smmu_ap { + qcom,additional-mapping = + /* modem tables in IMEM */ + <0x14683000 0x14683000 0x2000>; +};