ARM: dts: msm: Add parrot dts and dtsi files
Add context banks support for parrot Change-Id: Iec07cdee087f72762d278ac4c9015497c22ec007
This commit is contained in:
Akhil Manikoth Kallankandy
3
Kbuild
3
Kbuild
@@ -22,6 +22,9 @@ ifeq ($(CONFIG_ARCH_MONACO), y)
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dtbo-y += monaco/monaco-dsp.dtbo
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endif
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ifeq ($(CONFIG_ARCH_PARROT), y)
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dtbo-y += parrot/parrot-dsp.dtbo
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endif
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always-y := $(dtb-y) $(dtbo-y)
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subdir-y := $(dts-dirs)
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clean-files := *.dtb *.dtbo
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14
parrot/parrot-dsp.dts
Normal file
14
parrot/parrot-dsp.dts
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@@ -0,0 +1,14 @@
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// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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/dts-v1/;
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/plugin/;
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#include "parrot-dsp.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. parrot v1 SoC";
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compatible = "qcom,parrot";
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qcom,board-id = <0 0>;
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};
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234
parrot/parrot-dsp.dtsi
Normal file
234
parrot/parrot-dsp.dtsi
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@@ -0,0 +1,234 @@
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// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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&glink_edge {
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qcom,fastrpc {
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compatible = "qcom,fastrpc";
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qcom,glink-channels = "fastrpcglink-apps-dsp";
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qcom,intents = <0x64 64>;
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label = "adsp";
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memory-region = <&adsp_mem_heap>;
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qcom,vmids = <22 37>;
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compute-cb@1 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <3>;
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label = "adsprpc-smd";
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iommus = <&apps_smmu 0x1803 0x0>;
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qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
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qcom,iommu-faults = "stall-disable", "HUPCF";
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dma-coherent;
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pd-type = <1>;
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};
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compute-cb@2 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <4>;
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label = "adsprpc-smd";
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iommus = <&apps_smmu 0x1804 0x0>;
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qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
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qcom,iommu-faults = "stall-disable", "HUPCF";
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dma-coherent;
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pd-type = <2>;
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};
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compute-cb@3 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <5>;
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label = "adsprpc-smd";
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iommus = <&apps_smmu 0x1805 0x0>;
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qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
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qcom,iommu-faults = "stall-disable", "HUPCF";
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dma-coherent;
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qcom,nsessions = <5>;
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pd-type = <3>;
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};
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};
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};
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&remoteproc_cdsp_glink {
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qcom,fastrpc {
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compatible = "qcom,fastrpc";
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qcom,glink-channels = "fastrpcglink-apps-dsp";
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qcom,intents = <0x64 64>;
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label = "cdsp";
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qcom,fastrpc-gids = <2908>;
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qcom,rpc-latency-us = <235>;
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qcom,qos-cores = <0 1 2 3>;
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compute-cb@1 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <1>;
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label = "cdsprpc-smd";
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iommus = <&apps_smmu 0x1401 0x0400>;
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qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
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qcom,iommu-faults = "stall-disable", "HUPCF";
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dma-coherent;
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pd-type = <1>;
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};
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compute-cb@2 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <2>;
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label = "cdsprpc-smd";
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iommus = <&apps_smmu 0x1402 0x0400>;
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qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
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qcom,iommu-faults = "stall-disable", "HUPCF";
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dma-coherent;
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qcom,iova-max-align-shift = <9>;
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pd-type = <7>;
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};
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compute-cb@3 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <3>;
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label = "cdsprpc-smd";
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iommus = <&apps_smmu 0x1403 0x0400>;
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qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
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qcom,iommu-faults = "stall-disable", "HUPCF";
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dma-coherent;
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qcom,iova-max-align-shift = <9>;
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pd-type = <7>;
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};
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compute-cb@4 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <4>;
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label = "cdsprpc-smd";
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iommus = <&apps_smmu 0x1404 0x0400>;
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qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
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qcom,iommu-faults = "stall-disable", "HUPCF";
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dma-coherent;
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qcom,iova-max-align-shift = <9>;
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pd-type = <7>;
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};
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compute-cb@5 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <5>;
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label = "cdsprpc-smd";
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iommus = <&apps_smmu 0x1405 0x0400>;
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qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
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qcom,iommu-faults = "stall-disable", "HUPCF";
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dma-coherent;
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qcom,iova-max-align-shift = <9>;
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pd-type = <7>;
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};
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compute-cb@6 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <6>;
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label = "cdsprpc-smd";
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iommus = <&apps_smmu 0x1406 0x0400>;
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qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
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qcom,iommu-faults = "stall-disable", "HUPCF";
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dma-coherent;
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qcom,iova-max-align-shift = <9>;
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pd-type = <7>;
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};
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compute-cb@7 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <7>;
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label = "cdsprpc-smd";
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iommus = <&apps_smmu 0x1407 0x0400>;
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qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
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qcom,iommu-faults = "stall-disable", "HUPCF";
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dma-coherent;
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qcom,iova-max-align-shift = <9>;
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pd-type = <7>;
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};
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compute-cb@8 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <8>;
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label = "cdsprpc-smd";
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iommus = <&apps_smmu 0x1408 0x0400>;
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qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
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qcom,iommu-faults = "stall-disable", "HUPCF";
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dma-coherent;
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qcom,iova-max-align-shift = <9>;
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pd-type = <7>;
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};
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compute-cb@9 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <9>;
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label = "cdsprpc-smd";
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qcom,secure-context-bank;
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iommus = <&apps_smmu 0x1409 0x0400>;
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qcom,iommu-dma-addr-pool = <0x60000000 0x78000000>;
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qcom,iommu-faults = "stall-disable", "HUPCF";
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qcom,iommu-vmid = <0xA>;
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dma-coherent;
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pd-type = <6>;
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};
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compute-cb@10 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <11>;
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label = "cdsprpc-smd";
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iommus = <&apps_smmu 0x140B 0x0400>;
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qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
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qcom,iommu-faults = "stall-disable", "HUPCF";
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dma-coherent;
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qcom,iova-best-fit;
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qcom,iova-max-align-shift = <9>;
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pd-type = <7>;
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alloc-size-range = <0x0 0xFFFFFFFF>;
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};
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compute-cb@11 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <12>;
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label = "cdsprpc-smd";
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iommus = <&apps_smmu 0x140C 0x0400>;
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qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
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qcom,iommu-faults = "stall-disable", "HUPCF";
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dma-coherent;
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qcom,iova-max-align-shift = <9>;
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pd-type = <9>;
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alloc-size-range = <0x0 0xFFFFFFFF>;
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};
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compute-cb@12 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <13>;
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label = "cdsprpc-smd";
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iommus = <&apps_smmu 0x140D 0x0400>;
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qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
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qcom,iommu-faults = "stall-disable", "HUPCF";
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dma-coherent;
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qcom,iova-max-align-shift = <9>;
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pd-type = <9>;
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alloc-size-range = <0x0 0xFFFFFFFF>;
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};
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compute-cb@13 {
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compatible = "qcom,fastrpc-compute-cb";
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reg = <14>;
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label = "cdsprpc-smd";
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iommus = <&apps_smmu 0x140E 0x0400>;
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qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
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qcom,iommu-faults = "stall-disable", "HUPCF";
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dma-coherent;
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qcom,iova-max-align-shift = <9>;
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pd-type = <9>;
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alloc-size-range = <0x0 0xFFFFFFFF>;
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};
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};
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};
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