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arm64: dts: qcom: sun: Add pineapple and blair DT files to opensource

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Add the removed DT files of pineapple and blair targets to opensource
project.

Change-Id: I20afed782c053c2899fd3f662278f6721ad2e2e6
Signed-off-by: Anirudh Raghavendra <quic_araghave@quicinc.com>
This commit is contained in:
Anirudh Raghavendra
2024-02-22 15:45:21 -08:00
parent 735781a845
commit f96ec39484
7 changed files with 438 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

12
Kbuild
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@@ -1,3 +1,15 @@
ifeq ($(CONFIG_ARCH_PINEAPPLE), y)
ifeq ($(CONFIG_ARCH_QTI_VM), y)
dtbo-y += pineapple/pineapple-dsp-trustedvm.dtbo
else
dtbo-y += pineapple/pineapple-dsp.dtbo
endif
endif
ifeq ($(CONFIG_ARCH_BLAIR), y)
dtbo-y += blair/blair-dsp.dtbo
endif
ifeq ($(CONFIG_ARCH_SUN), y) ifeq ($(CONFIG_ARCH_SUN), y)
ifeq ($(CONFIG_ARCH_QTI_VM), y) ifeq ($(CONFIG_ARCH_QTI_VM), y)
dtbo-y += sun/sun-dsp-trustedvm.dtbo dtbo-y += sun/sun-dsp-trustedvm.dtbo

11
blair/blair-dsp.dts Normal file
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@@ -0,0 +1,11 @@
/dts-v1/;
/plugin/;
#include "blair-dsp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. blair v1 SoC";
compatible = "qcom,blair";
qcom,msm-id = <507 0x10000>, <578 0x10000>;
qcom,board-id = <0 0>;
};

132
blair/blair-dsp.dtsi Normal file
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@@ -0,0 +1,132 @@
&remoteproc_adsp_glink {
qcom,fastrpc {
compatible = "qcom,fastrpc";
qcom,glink-channels = "fastrpcglink-apps-dsp";
qcom,intents = <0x64 64>;
label = "adsp";
memory-region = <&adsp_mem_heap>;
qcom,vmids = <22 37>;
compute-cb@1 {
compatible = "qcom,fastrpc-compute-cb";
reg = <3>;
iommus = <&apps_smmu 0x00A3 0x0000>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
compute-cb@2 {
compatible = "qcom,fastrpc-compute-cb";
reg = <4>;
iommus = <&apps_smmu 0x00A4 0x0000>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
compute-cb@3 {
compatible = "qcom,fastrpc-compute-cb";
reg = <5>;
iommus = <&apps_smmu 0x00A5 0x0000>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
qcom,nsessions = <8>;
dma-coherent;
};
compute-cb@4 {
compatible = "qcom,fastrpc-compute-cb";
reg = <6>;
iommus = <&apps_smmu 0x00A6 0x0000>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
compute-cb@5 {
compatible = "qcom,fastrpc-compute-cb";
reg = <7>;
iommus = <&apps_smmu 0x00A7 0x0000>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
};
};
&remoteproc_cdsp_glink {
qcom,fastrpc {
compatible = "qcom,fastrpc";
qcom,glink-channels = "fastrpcglink-apps-dsp";
qcom,intents = <0x64 64>;
label = "cdsp";
qcom,fastrpc-gids = <2908>;
qcom,rpc-latency-us = <611>;
compute-cb@1 {
compatible = "qcom,fastrpc-compute-cb";
reg = <1>;
iommus = <&apps_smmu 0x1001 0x0000>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
compute-cb@2 {
compatible = "qcom,fastrpc-compute-cb";
reg = <2>;
iommus = <&apps_smmu 0x1002 0x0000>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
compute-cb@3 {
compatible = "qcom,fastrpc-compute-cb";
reg = <3>;
iommus = <&apps_smmu 0x1003 0x0000>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
compute-cb@4 {
compatible = "qcom,fastrpc-compute-cb";
reg = <4>;
iommus = <&apps_smmu 0x1004 0x0000>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
compute-cb@5 {
compatible = "qcom,fastrpc-compute-cb";
reg = <5>;
iommus = <&apps_smmu 0x1005 0x0000>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
compute-cb@6 {
compatible = "qcom,fastrpc-compute-cb";
reg = <6>;
iommus = <&apps_smmu 0x1006 0x0000>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
};
compute-cb@9 {
compatible = "qcom,fastrpc-compute-cb";
reg = <9>;
qcom,secure-context-bank;
iommus = <&apps_smmu 0x1009 0x0000>;
qcom,iommu-dma-addr-pool = <0x80000000 0x78000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */
dma-coherent;
};
};
};

10
pineapple/pineapple-dsp-trustedvm.dts Normal file
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@@ -0,0 +1,10 @@
/dts-v1/;
/plugin/;
#include "pineapple-dsp-trustedvm.dtsi"
/ {
model = "Qualcomm Technologies, Inc. Pineapple - TrustedVM";
compatible = "qcom,pineapple";
qcom,msm-id = <557 0x10000>;
};

33
pineapple/pineapple-dsp-trustedvm.dtsi Normal file
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@@ -0,0 +1,33 @@
#include <dt-bindings/soc/qcom,ipcc.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>
&soc {
msm_fastrpc: qcom,msm_fastrpc {
compatible = "qcom,msm-fastrpc-compute";
qcom,rpc-latency-us = <235>;
qcom,fastrpc-gids = <2908>;
qcom,qos-cores = <0 1 2 3>;
fastrpc_compute_cb1: qcom,msm_fastrpc_compute_cb1 {
compatible = "qcom,msm-fastrpc-compute-cb";
label = "cdsprpc-smd";
iommus = <&apps_smmu 0xC0B 0x0>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
qrtr-gen-pool = <&fastrpc_compute_cb1>;
frpc-gen-addr-pool = <0x8000 0x9000>;
pd-type = <4>; /* SECURE_STATICPD */
};
};
qrtr-genpool {
compatible = "qcom,qrtr-genpool";
gen-pool = <&fastrpc_compute_cb1>;
interrupt-parent = <&ipcc_mproc_ns1>;
interrupts = <IPCC_CLIENT_CDSP 0 IRQ_TYPE_EDGE_RISING>,
<IPCC_CLIENT_CDSP 1 IRQ_TYPE_EDGE_RISING>;
mboxes = <&ipcc_mproc_ns1 IPCC_CLIENT_CDSP 0>,
<&ipcc_mproc_ns1 IPCC_CLIENT_CDSP 1>;
};
};

15
pineapple/pineapple-dsp.dts Normal file
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@@ -0,0 +1,15 @@
/dts-v1/;
/plugin/;
#include <dt-bindings/interrupt-controller/arm-gic.h>
#include <dt-bindings/soc/qcom,ipcc.h>
#include <dt-bindings/interconnect/qcom,pineapple.h>
#include <dt-bindings/clock/qcom,videocc-pineapple.h>
#include <dt-bindings/clock/qcom,gcc-pineapple.h>
#include "pineapple-dsp.dtsi"
/ {
model = "Qualcomm Technologies, Inc. pineapple v1 SoC";
compatible = "qcom,pineapple";
qcom,board-id = <0 0>;
};

225
pineapple/pineapple-dsp.dtsi Normal file
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@@ -0,0 +1,225 @@
&glink_edge {
qcom,fastrpc {
compatible = "qcom,fastrpc";
qcom,glink-channels = "fastrpcglink-apps-dsp";
qcom,intents = <0x64 64>;
label = "adsp";
memory-region = <&adsp_mem_heap>;
qcom,vmids = <22 37>;
compute-cb@1 {
compatible = "qcom,fastrpc-compute-cb";
reg = <3>;
iommus = <&apps_smmu 0x1003 0x0080>,
<&apps_smmu 0x1043 0x0020>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <1>; /* ROOT_PD */
};
compute-cb@2 {
compatible = "qcom,fastrpc-compute-cb";
reg = <4>;
iommus = <&apps_smmu 0x1004 0x0080>,
<&apps_smmu 0x1044 0x0020>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
qcom,nsessions = <8>;
dma-coherent;
pd-type = <3>; /* SENSORS_STATICPD */
};
compute-cb@3 {
compatible = "qcom,fastrpc-compute-cb";
reg = <5>;
iommus = <&apps_smmu 0x1005 0x0080>,
<&apps_smmu 0x1045 0x0020>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <2>; /* AUDIO_STATICPD */
};
compute-cb@4 {
compatible = "qcom,fastrpc-compute-cb";
reg = <6>;
iommus = <&apps_smmu 0x1006 0x0080>,
<&apps_smmu 0x1046 0x0020>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <7>; /* USERPD */
};
compute-cb@5 {
compatible = "qcom,fastrpc-compute-cb";
reg = <7>;
iommus = <&apps_smmu 0x1007 0x0040>,
<&apps_smmu 0x1067 0x0000>,
<&apps_smmu 0x1087 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <7>; /* USERPD */
};
};
};
&remoteproc_cdsp_glink {
qcom,fastrpc {
compatible = "qcom,fastrpc";
qcom,glink-channels = "fastrpcglink-apps-dsp";
qcom,intents = <0x64 64>;
label = "cdsp";
qcom,fastrpc-gids = <2908>;
qcom,rpc-latency-us = <235>;
compute-cb@1 {
compatible = "qcom,fastrpc-compute-cb";
reg = <1>;
iommus = <&apps_smmu 0x1961 0x0000>,
<&apps_smmu 0x0C01 0x0020>,
<&apps_smmu 0x19C1 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <1>; /* ROOT_PD */
};
compute-cb@2 {
compatible = "qcom,fastrpc-compute-cb";
reg = <2>;
iommus = <&apps_smmu 0x1962 0x0000>,
<&apps_smmu 0x0C02 0x0020>,
<&apps_smmu 0x19C2 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <7>; /* USERPD */
};
compute-cb@3 {
compatible = "qcom,fastrpc-compute-cb";
reg = <3>;
iommus = <&apps_smmu 0x1963 0x0000>,
<&apps_smmu 0x0C03 0x0020>,
<&apps_smmu 0x19C3 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <7>; /* USERPD */
};
compute-cb@4 {
compatible = "qcom,fastrpc-compute-cb";
reg = <4>;
iommus = <&apps_smmu 0x1964 0x0000>,
<&apps_smmu 0x0C04 0x0020>,
<&apps_smmu 0x19C4 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <7>; /* USERPD */
};
compute-cb@5 {
compatible = "qcom,fastrpc-compute-cb";
reg = <5>;
iommus = <&apps_smmu 0x1965 0x0000>,
<&apps_smmu 0x0C05 0x0020>,
<&apps_smmu 0x19C5 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <7>; /* USERPD */
};
compute-cb@6 {
compatible = "qcom,fastrpc-compute-cb";
reg = <6>;
iommus = <&apps_smmu 0x1966 0x0000>,
<&apps_smmu 0x0C06 0x0020>,
<&apps_smmu 0x19C6 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <7>; /* USERPD */
};
compute-cb@7 {
compatible = "qcom,fastrpc-compute-cb";
reg = <7>;
iommus = <&apps_smmu 0x1967 0x0000>,
<&apps_smmu 0x0C07 0x0020>,
<&apps_smmu 0x19C7 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <7>; /* USERPD */
};
compute-cb@8 {
compatible = "qcom,fastrpc-compute-cb";
reg = <8>;
iommus = <&apps_smmu 0x1968 0x0000>,
<&apps_smmu 0x0C08 0x0020>,
<&apps_smmu 0x19C8 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <7>; /* USERPD */
};
compute-cb@9 {
compatible = "qcom,fastrpc-compute-cb";
reg = <9>;
qcom,secure-context-bank;
iommus = <&apps_smmu 0x1969 0x0000>,
<&apps_smmu 0x0C09 0x0020>,
<&apps_smmu 0x19C9 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
qcom,iommu-vmid = <0xA>; /* VMID_CP_PIXEL */
qcom,nsessions = <3>;
dma-coherent;
pd-type = <6>; /* CPZ_USERPD */
};
compute-cb@10 {
compatible = "qcom,fastrpc-compute-cb";
reg = <12>;
iommus = <&apps_smmu 0x196C 0x0000>,
<&apps_smmu 0x0C0C 0x0020>,
<&apps_smmu 0x19CC 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <7>; /* USERPD */
};
compute-cb@11 {
compatible = "qcom,fastrpc-compute-cb";
reg = <13>;
iommus = <&apps_smmu 0x196D 0x0000>,
<&apps_smmu 0x0C0D 0x0020>,
<&apps_smmu 0x19CD 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <7>; /* USERPD */
};
compute-cb@12 {
compatible = "qcom,fastrpc-compute-cb";
reg = <14>;
iommus = <&apps_smmu 0x196E 0x0000>,
<&apps_smmu 0x0C0E 0x0020>,
<&apps_smmu 0x19CE 0x0000>;
qcom,iommu-dma-addr-pool = <0x10000000 0xF0000000>;
qcom,iommu-faults = "stall-disable", "HUPCF";
dma-coherent;
pd-type = <7>; /* USERPD */
};
};
};