samsung_sm8750/android_kernel_samsung_sm8750-devicetrees
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Merge "ARM: dts: msm: tuna: modify capacity property"

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QCTECMDR Service
2024-09-30 22:11:43 -07:00
committed by Gerrit - the friendly Code Review server
parent ab8232eec4 89345bbfae
commit f94f35a81c
1 changed files with 6 additions and 6 deletions
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qcom/tuna.dtsi
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@@ -137,7 +137,7 @@
power-domain-names = "psci"; power-domain-names = "psci";
cpu-release-addr = <0x0 0xE3940000>; cpu-release-addr = <0x0 0xE3940000>;
next-level-cache = <&L2_2>; next-level-cache = <&L2_2>;
capacity-dmips-mhz = <1321>; capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <121>; dynamic-power-coefficient = <121>;
L2_2: l2-cache { L2_2: l2-cache {
compatible = "cache"; compatible = "cache";
@@ -156,7 +156,7 @@
power-domain-names = "psci"; power-domain-names = "psci";
cpu-release-addr = <0x0 0xE3940000>; cpu-release-addr = <0x0 0xE3940000>;
next-level-cache = <&L2_3>; next-level-cache = <&L2_3>;
capacity-dmips-mhz = <1321>; capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <121>; dynamic-power-coefficient = <121>;
L2_3: l2-cache { L2_3: l2-cache {
compatible = "cache"; compatible = "cache";
@@ -175,7 +175,7 @@
power-domain-names = "psci"; power-domain-names = "psci";
cpu-release-addr = <0x0 0xE3940000>; cpu-release-addr = <0x0 0xE3940000>;
next-level-cache = <&L2_4>; next-level-cache = <&L2_4>;
capacity-dmips-mhz = <1321>; capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <121>; dynamic-power-coefficient = <121>;
L2_4: l2-cache { L2_4: l2-cache {
compatible = "cache"; compatible = "cache";
@@ -194,7 +194,7 @@
power-domain-names = "psci"; power-domain-names = "psci";
cpu-release-addr = <0x0 0xE3940000>; cpu-release-addr = <0x0 0xE3940000>;
next-level-cache = <&L2_5>; next-level-cache = <&L2_5>;
capacity-dmips-mhz = <1321>; capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <121>; dynamic-power-coefficient = <121>;
L2_5: l2-cache { L2_5: l2-cache {
compatible = "cache"; compatible = "cache";
@@ -213,7 +213,7 @@
power-domain-names = "psci"; power-domain-names = "psci";
cpu-release-addr = <0x0 0xE3940000>; cpu-release-addr = <0x0 0xE3940000>;
next-level-cache = <&L2_6>; next-level-cache = <&L2_6>;
capacity-dmips-mhz = <1321>; capacity-dmips-mhz = <1024>;
dynamic-power-coefficient = <121>; dynamic-power-coefficient = <121>;
L2_6: l2-cache { L2_6: l2-cache {
compatible = "cache"; compatible = "cache";
@@ -232,7 +232,7 @@
power-domain-names = "psci"; power-domain-names = "psci";
cpu-release-addr = <0x0 0xE3940000>; cpu-release-addr = <0x0 0xE3940000>;
next-level-cache = <&L2_7>; next-level-cache = <&L2_7>;
capacity-dmips-mhz = <1935>; capacity-dmips-mhz = <1300>;
dynamic-power-coefficient = <295>; dynamic-power-coefficient = <295>;
L2_7: l2-cache { L2_7: l2-cache {
compatible = "cache"; compatible = "cache";