samsung_sm8750/android_kernel_samsung_sm8750-devicetrees
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ARM: dts: msm: Add L3K regulator and pcie_rp support

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Add L3K regulator support and change pcie0_rp to pcie_rp. In addition,
enable canoe dtsi compilation.

Change-Id: I2771e43d559c5ae67d5fad04b45eac7060c94d72
CRs-Fixed: 3986494
This commit is contained in:
Alan Z. Chen
2024-11-27 15:31:11 -08:00
parent 4ac99ae337
commit f43fdbf553
3 changed files with 11 additions and 2 deletions
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5
Kbuild
View File

@@ -1,3 +1,8 @@
ifeq ($(CONFIG_ARCH_CANOE),y)
dtbo-y += canoe-kiwi-cnss.dtbo
dtbo-y += canoe-peach-cnss.dtbo
endif
ifeq ($(CONFIG_ARCH_SUN),y) ifeq ($(CONFIG_ARCH_SUN),y)
dtbo-y += sun-kiwi-cnss.dtbo dtbo-y += sun-kiwi-cnss.dtbo
dtbo-y += sun-kiwi-cnss-v8.dtbo dtbo-y += sun-kiwi-cnss-v8.dtbo

4
canoe-kiwi-cnss.dtsi
View File

@@ -103,6 +103,8 @@
qcom,vdd-wlan-rfa1-config = <1864000 2000000 0 0 1>; qcom,vdd-wlan-rfa1-config = <1864000 2000000 0 0 1>;
vdd-wlan-rfa2-supply = <&S7F>; vdd-wlan-rfa2-supply = <&S7F>;
qcom,vdd-wlan-rfa2-config = <1316000 1400000 0 0 1>; qcom,vdd-wlan-rfa2-config = <1316000 1400000 0 0 1>;
vdd-wlan-ant-share-supply = <&L3K>;
qcom,vdd-wlan-ant-share-config = <1200000 1200000 0 0 1>;
//TODO: extractor regulator is required or not //TODO: extractor regulator is required or not
// TODO PDC TABLE BUS BW // TODO PDC TABLE BUS BW
// PDC MAP AND PMU Vreg Map // PDC MAP AND PMU Vreg Map
@@ -114,7 +116,7 @@
}; };
}; };
&pcie0_rp { &pcie_rp {
cnss_pci0: cnss_pci0 { cnss_pci0: cnss_pci0 {
reg = <0 0 0 0 0>; reg = <0 0 0 0 0>;

4
canoe-peach-cnss.dtsi
View File

@@ -120,6 +120,8 @@
qcom,vdd-wlan-rfa1-config = <1876000 2000000 0 0 1>; qcom,vdd-wlan-rfa1-config = <1876000 2000000 0 0 1>;
vdd-wlan-rfa2-supply = <&S7F>; vdd-wlan-rfa2-supply = <&S7F>;
qcom,vdd-wlan-rfa2-config = <1328000 1340000 0 0 1>; qcom,vdd-wlan-rfa2-config = <1328000 1340000 0 0 1>;
vdd-wlan-ant-share-supply = <&L3K>;
qcom,vdd-wlan-ant-share-config = <1200000 1200000 0 0 1>;
qcom,vreg_pdc_map = qcom,vreg_pdc_map =
"s1j", "bb", "s1j", "bb",
@@ -146,7 +148,7 @@
}; };
}; };
&pcie0_rp { &pcie_rp {
cnss_pci0: cnss_pci0 { cnss_pci0: cnss_pci0 {
reg = <0 0 0 0 0>; reg = <0 0 0 0 0>;
qcom,iommu-group = <&cnss_audio_iommu_group0>; qcom,iommu-group = <&cnss_audio_iommu_group0>;