Merge ba57d9bb83 on remote branch
Change-Id: If43fea691deb59eb7ca2922589de9ecae0880c75
This commit is contained in:
Linux Build Service Account
11
Kbuild
11
Kbuild
@@ -10,10 +10,19 @@ ifeq ($(CONFIG_ARCH_SUN), y)
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sun-mm-mtp-nfc-overlay.dtbo \
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sun-mm-mtp-overlay.dtbo \
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sun-mm-mtp-v8-overlay.dtbo \
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sun-mm-mtp-qmp1000-overlay.dtbo \
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sun-mm-mtp-qmp1000-v8-overlay.dtbo \
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sun-mm-qrd-sku1-overlay.dtbo \
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sun-mm-qrd-sku1-v8-overlay.dtbo \
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sun-mm-qrd-sku2-v8-overlay.dtbo \
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sun-mm-rumi-overlay.dtbo
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sun-mm-rumi-overlay.dtbo \
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sun-mm-rcm-overlay.dtbo \
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sun-mm-atp-overlay.dtbo \
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sun-mm-cdp-ganges-nodisplay-overlay.dtbo \
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sun-mm-mtp-3-5mm-overlay.dtbo \
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sun-mm-rcm-kiwi-overlay.dtbo \
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sun-mm-rcm-kiwi-v8-overlay.dtbo \
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sun-mm-rcm-v8-overlay.dtbo
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endif
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always-y := $(dtb-y) $(dtbo-y)
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@@ -1,125 +0,0 @@
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Qualcomm Technologies, Inc. HW FENCE
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HW Fence implements Linux APIs to initialize, deinitialize, register-for-signal, and
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overall manage the hw-fences, for hw-to-hw communcation between hw cores.
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Required properties
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- compatible: Must be "qcom,msm-hw-fence".
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- qcom,ipcc-reg: Registers ranges for ipcc registers.
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- qcom,hw-fence-table-entries: A u32 indicating number of entries for the hw-fence table
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- qcom,hw-fence-queue-entries: A u32 indicating default number of entries for the Queues
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- hw_fence@1: Carved-out memory-mapping region, to be used for mapping of global tables and queues
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used by the hw-fence driver and fence controller running either in secondary vm or
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on SOCCP.
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Required properties on targets without SOCCP:
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- hw_fence@0: Doorbell configuration to communicate with secondary vm through hypervisor.
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Required properties on targets with SOCCP:
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- soccp_controller: Phandle for the soccp controller.
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- interrupts: Interrupt associated with APSS NS0 (to receive interrupts from SOCCP).
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- interrupt-controller: Mark the device node as an interrupt controller.
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- #interrupt-cells: Should be one. The first cell is interrupt number.
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- iommus: Specifies the SID's used by this context bank.
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Optional properties:
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- qcom,hw-fence-ipc-ver: A u32 indicating ipc version. If not provided in device-tree, this is read
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from the registers.
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- qcom,hw-fence-client-type-[name]: A list of four u32 indicating <clients_num, queues_num,
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queue_entries, skip_txq_wr_idx>, where [name] specifies the client
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type these properties apply to. If provided, all four u32 values
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must be provided, and these override default values specified by
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the driver for some clients (e.g. dpu, gpu).
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-- clients_num: number of clients for given client type
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-- queues_num: 1 queue (TxQ) or 2 queues (RxQ and TxQ)
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-- queue_entries: number of entries per client queue
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-- skip_txq_wr_idx: bool indicating whether tx queue wr_idx update
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is skipped within hw fence driver and
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hfi_header->tx_wm is used instead
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- qcom,hw-fence-client-type-[name]-extra: A list of four u32 indicating extra client queue
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properties: <start_padding, end_padding, txq_idx_start,
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txq_idx_by_payload>. Later u32 values do not need to be
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provided to provide values for earlier u32 values.
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-- start_padding: size of padding between queue table header
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and first queue header in bytes
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-- end_padding: size of padding between queue header(s) and
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first queue payload in bytes
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-- txq_idx_start: start_index for TxQ rd_wr_index
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-- txq_idx_by_payload: bool indicating whether TxQ rd_wr_idx
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indexes by payloads instead of default
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dwords
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Example for target with SOCCP:
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msm_hw_fence: qcom,hw-fence {
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compatible = "qcom,msm-hw-fence";
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status = "ok";
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/* SOCCP properties */
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interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-controller;
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#interrupt-cells = <1>;
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iommus = <&apps_smmu 0x562 0x1>;
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soccp_controller = <&soccp_pas>;
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qcom,ipcc-reg = <0x400000 0x100000>;
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qcom,hw-fence-table-entries = <8192>;
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qcom,hw-fence-queue-entries = <800>;
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/* time register */
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qcom,qtime-reg = <0xC221000 0x1000>;
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/* ipc version */
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qcom,hw-fence-ipc-ver = <0x20003>;
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/* base client queue properties */
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qcom,hw-fence-client-type-dpu = <4 2 128 0>;
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qcom,hw-fence-client-type-ife2 = <3 1 64 1>;
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/* extra client queue properties */
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qcom,hw-fence-client-type-ife2-extra = <20 28 1 1>;
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/* haven io-mem specific */
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hw_fence@1 {
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compatible = "qcom,msm-hw-fence-mem";
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qcom,master;
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shared-buffer = <&hwfence_shbuf>;
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};
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};
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Example for target without SOCCP:
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msm_hw_fence: qcom,hw-fence {
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compatible = "qcom,msm-hw-fence";
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status = "ok";
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qcom,ipcc-reg = <0x400000 0x100000>;
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qcom,hw-fence-table-entries = <8192>;
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qcom,hw-fence-queue-entries = <800>;
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/* time register */
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qcom,qtime-reg = <0xC221000 0x1000>;
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/* ipc version */
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qcom,hw-fence-ipc-ver = <0x20003>;
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/* base client queue properties */
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qcom,hw-fence-client-type-dpu = <4 2 128 0>;
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qcom,hw-fence-client-type-ife2 = <3 1 64 1>;
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/* extra client queue properties */
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qcom,hw-fence-client-type-ife2-extra = <20 28 1 1>;
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/* haven doorbell specific */
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hw_fence@0 {
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compatible = "qcom,msm-hw-fence-db";
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qcom,master;
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gunyah-label = <6>;
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peer-name = <3>;
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};
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/* haven io-mem specific */
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hw_fence@1 {
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compatible = "qcom,msm-hw-fence-mem";
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qcom,master;
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gunyah-label = <5>;
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peer-name = <3>;
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shared-buffer = <&hwfence_shbuf>;
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};
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};
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227
bindings/hw-fence.yaml
Normal file
227
bindings/hw-fence.yaml
Normal file
@@ -0,0 +1,227 @@
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# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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%YAML 1.2
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---
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$id: http://devicetree.org/schemas/hw-fence.yaml#
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$schema: http://devicetree.org/meta-schemas/core.yaml#
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title: HW Fence
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maintainers:
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- Grace An <quic_gracan@quicinc.com>
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- Kalyan Thota <quic_kalyant@quicinc.com>
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description: |
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HW Fence implements Linux APIs to initialize, deinitialize, register-for-signal, and
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overall manage the hw-fences, for hw-to-hw communcation between hw cores.
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properties:
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compatible:
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const: qcom,msm-hw-fence
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qcom,ipcc-reg:
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description: Registers ranges for ipcc registers.
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qcom,hw-fence-table-entries:
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description: A u32 indicating number of entries for the hw-fence table
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$ref: /schemas/types.yaml#/definitions/uint32
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qcom,hw-fence-queue-entries:
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description: A u32 indicating default number of entries for the Queues
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$ref: /schemas/types.yaml#/definitions/uint32
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hw_fence@0:
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description: Doorbell configuration to communicate with secondary vm through hypervisor.
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type: object
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properties:
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compatible:
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const: qcom,msm-hw-fence-db
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qcom,master: true
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gunyah-label:
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$ref: /schemas/types.yaml#/definitions/uint32
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peer-name:
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$ref: /schemas/types.yaml#/definitions/uint32
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hw_fence@1:
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description: |
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Carved-out memory-mapping region, to be used for mapping of global tables and
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queues used by the hw-fence driver and fence controller running in secondary vm.
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type: object
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properties:
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compatible:
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const: qcom,msm-hw-fence-mem
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qcom,master: true
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gunyah-label:
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$ref: /schemas/types.yaml#/definitions/uint32
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peer-name:
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$ref: /schemas/types.yaml#/definitions/uint32
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shared-buffer:
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$ref: /schemas/types.yaml#/definitions/phandle
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qcom,hw-fence-ipc-ver:
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description: |
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A u32 indicating ipc version. If not provided in device-tree, this is read from
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the registers.
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$ref: /schemas/types.yaml#/definitions/uint32
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soccp_controller:
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description: phandle for the soccp controller.
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$ref: /schemas/types.yaml#/definitions/phandle
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interrupts:
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description: Interrupt associated with APSS NS0 (to receive interrupts from SOCCP).
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interrupt-controller: true
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description: Mark the device node as an interrupt controller.
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'#interrupt-cells':
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description: Should be one. The first cell is interrupt number.
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const: 1
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iommus:
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description: Specifies the SID's used by this context bank.
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patternProperties:
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"qcom,hw\-fence\-client\-type\-+\w":
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description: |
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A list of four u32 describing client properties that
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override default values specified by the driver for some clients.
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$ref: /schemas/types.yaml#/definitions/uint32-array
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items:
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- description: number of clients for given type
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- enum:
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- 1
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- 2
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description: 1 (Tx) or 2 (Rx and Tx)
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- description: number of entries per client queue
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- enum:
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- 0
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- 1
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description: |
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bool indicating whether tx queue wr_idx update is skipped within hw fence
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driver and hfi_header->tx_wm is used instead
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"qcom,hw\-fence\-client\-type\-+\w+\-extra":
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description: |
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A list of four u32 indicating extra client queue properties.Later u32 values do not need to
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be provided to provide values for earlier u32 values.
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minItems: 1
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maxItems: 4
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$ref: /schemas/types.yaml#/definitions/uint32-array
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items:
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- description: size of padding between queue table header and first queue header in bytes
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- description: size of padding between queue header(s) and first queue payload in bytes
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- description: start_index for TxQ rd_wr_index
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- enum:
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- 0
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- 1
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description: |
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bool indicating whether TxQ rd_wr_idx indexes by payloads instead of
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default dwords
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required:
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- compatible
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- qcom,ipcc-reg
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- qcom,hw-fence-table-entries
|
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- qcom,hw-fence-queue-entries
|
||||
- hw_fence@1
|
||||
|
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if:
|
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required:
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- soccp-controller
|
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then:
|
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required:
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- interrupts
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- interrupt-controller
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- '#interrupt-cells'
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- iommus
|
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properties:
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hw_fence@0: false
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else:
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required:
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- hw_fence@0
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properties:
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- interrupts: false
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- interrupt-controller: false
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- '#interrupt-cells': false
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- iommus: false
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additionalProperties: false
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|
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examples:
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- |
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msm_hw_fence: qcom,hw-fence {
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compatible = "qcom,msm-hw-fence";
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status = "ok";
|
||||
|
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qcom,ipcc-reg = <0x400000 0x100000>;
|
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qcom,hw-fence-table-entries = <8192>;
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qcom,hw-fence-queue-entries = <800>;
|
||||
|
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# time register
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qcom,qtime-reg = <0xC221000 0x1000>;
|
||||
|
||||
# ipc version
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qcom,hw-fence-ipc-ver = <0x20003>;
|
||||
|
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# client queues: clients_num, queues_num, queue_entries, skip_txq_wr_idx
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qcom,hw-fence-client-type-dpu = <4 2 128 0>;
|
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qcom,hw-fence-client-type-ife2 = <3 1 64 1>;
|
||||
|
||||
# extra client queue properties
|
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qcom,hw-fence-client-type-ife2-extra = <20 28 1 1>;
|
||||
|
||||
# haven doorbell specific
|
||||
hw_fence@0 {
|
||||
compatible = "qcom,msm-hw-fence-db";
|
||||
qcom,master;
|
||||
gunyah-label = <6>;
|
||||
peer-name = <3>;
|
||||
};
|
||||
|
||||
# haven io-mem specific
|
||||
hw_fence@1 {
|
||||
compatible = "qcom,msm-hw-fence-mem";
|
||||
qcom,master;
|
||||
gunyah-label = <5>;
|
||||
peer-name = <3>;
|
||||
shared-buffer = <&hwfence_shbuf>;
|
||||
};
|
||||
};
|
||||
|
||||
- |
|
||||
msm_hw_fence: qcom,hw-fence {
|
||||
compatible = "qcom,msm-hw-fence";
|
||||
status = "ok";
|
||||
|
||||
# SOCCP properties
|
||||
interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>;
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
iommus = <&apps_smmu 0x562 0x1>;
|
||||
soccp_controller = <&soccp_pas>;
|
||||
|
||||
qcom,ipcc-reg = <0x400000 0x100000>;
|
||||
qcom,hw-fence-table-entries = <8192>;
|
||||
qcom,hw-fence-queue-entries = <800>;
|
||||
|
||||
# time register
|
||||
qcom,qtime-reg = <0xC221000 0x1000>;
|
||||
|
||||
# ipc version
|
||||
qcom,hw-fence-ipc-ver = <0x20003>;
|
||||
|
||||
# base client queue properties
|
||||
qcom,hw-fence-client-type-dpu = <4 2 128 0>;
|
||||
qcom,hw-fence-client-type-ife2 = <3 1 64 1>;
|
||||
|
||||
# extra client queue properties
|
||||
qcom,hw-fence-client-type-ife2-extra = <20 28 1 1>;
|
||||
|
||||
# haven io-mem specific
|
||||
hw_fence@1 {
|
||||
compatible = "qcom,msm-hw-fence-mem";
|
||||
qcom,master;
|
||||
shared-buffer = <&hwfence_shbuf>;
|
||||
};
|
||||
};
|
||||
...
|
||||
@@ -15,6 +15,7 @@
|
||||
interrupt-controller;
|
||||
#interrupt-cells = <1>;
|
||||
iommus = <&apps_smmu 0x562 0x1>;
|
||||
dma-coherent;
|
||||
soccp_controller = <&soccp_pas>;
|
||||
|
||||
qcom,hw-fence-table-entries = <8192>;
|
||||
|
||||
16
sun-mm-atp-overlay.dts
Normal file
16
sun-mm-atp-overlay.dts
Normal file
@@ -0,0 +1,16 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "hw_fence/sun-hw-fence.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. Sun ATP";
|
||||
compatible = "qcom,sun-atp", "qcom,sun", "qcom,sunp-atp", "qcom,sunp", "qcom,atp";
|
||||
qcom,msm-id = <618 0x10000>, <618 0x20000>;
|
||||
qcom,board-id = <0x10021 0>;
|
||||
};
|
||||
16
sun-mm-cdp-ganges-nodisplay-overlay.dts
Normal file
16
sun-mm-cdp-ganges-nodisplay-overlay.dts
Normal file
@@ -0,0 +1,16 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "hw_fence/sun-hw-fence.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. Sun CDP No Display";
|
||||
compatible = "qcom,sun-cdp", "qcom,sun", "qcom,cdp";
|
||||
qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>;
|
||||
qcom,board-id = <0x30001 0>;
|
||||
};
|
||||
16
sun-mm-mtp-3-5mm-overlay.dts
Normal file
16
sun-mm-mtp-3-5mm-overlay.dts
Normal file
@@ -0,0 +1,16 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "hw_fence/sun-hw-fence.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. Sun MTP with 3.5mm";
|
||||
compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp", "qcom,mtp";
|
||||
qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>;
|
||||
qcom,board-id = <0x60008 0>;
|
||||
};
|
||||
17
sun-mm-mtp-qmp1000-overlay.dts
Normal file
17
sun-mm-mtp-qmp1000-overlay.dts
Normal file
@@ -0,0 +1,17 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "hw_fence/sun-hw-fence.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. Sun MTP QMP1000";
|
||||
compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp",
|
||||
"qcom,mtp";
|
||||
qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>;
|
||||
qcom,board-id = <0x10108 0>;
|
||||
};
|
||||
17
sun-mm-mtp-qmp1000-v8-overlay.dts
Normal file
17
sun-mm-mtp-qmp1000-v8-overlay.dts
Normal file
@@ -0,0 +1,17 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "hw_fence/sun-hw-fence.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. Sun MTP QMP1000 V8 Power Grid";
|
||||
compatible = "qcom,sun-mtp", "qcom,sun", "qcom,sunp-mtp", "qcom,sunp",
|
||||
"qcom,mtp";
|
||||
qcom,msm-id = <618 0x10000>, <618 0x20000>, <639 0x10000>, <639 0x20000>;
|
||||
qcom,board-id = <0x40108 0>;
|
||||
};
|
||||
16
sun-mm-rcm-kiwi-overlay.dts
Normal file
16
sun-mm-rcm-kiwi-overlay.dts
Normal file
@@ -0,0 +1,16 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "hw_fence/sun-hw-fence.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. Sun RCM Kiwi WLAN";
|
||||
compatible = "qcom,sun-rcm", "qcom,sun", "qcom,sunp-rcm", "qcom,sunp", "qcom,rcm";
|
||||
qcom,msm-id = <618 0x10000>, <618 0x20000>;
|
||||
qcom,board-id = <0x40015 0>;
|
||||
};
|
||||
16
sun-mm-rcm-kiwi-v8-overlay.dts
Normal file
16
sun-mm-rcm-kiwi-v8-overlay.dts
Normal file
@@ -0,0 +1,16 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "hw_fence/sun-hw-fence.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. Sun RCM Kiwi WLAN V8 Power Grid";
|
||||
compatible = "qcom,sun-rcm", "qcom,sun", "qcom,sunp-rcm", "qcom,sunp", "qcom,rcm";
|
||||
qcom,msm-id = <618 0x10000>, <618 0x20000>;
|
||||
qcom,board-id = <0x20015 0>;
|
||||
};
|
||||
16
sun-mm-rcm-overlay.dts
Normal file
16
sun-mm-rcm-overlay.dts
Normal file
@@ -0,0 +1,16 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "hw_fence/sun-hw-fence.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. Sun RCM";
|
||||
compatible = "qcom,sun-rcm", "qcom,sun", "qcom,rcm";
|
||||
qcom,msm-id = <618 0x10000>, <618 0x20000>;
|
||||
qcom,board-id = <0x15 0>;
|
||||
};
|
||||
16
sun-mm-rcm-v8-overlay.dts
Normal file
16
sun-mm-rcm-v8-overlay.dts
Normal file
@@ -0,0 +1,16 @@
|
||||
// SPDX-License-Identifier: BSD-3-Clause
|
||||
/*
|
||||
* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
|
||||
*/
|
||||
|
||||
/dts-v1/;
|
||||
/plugin/;
|
||||
|
||||
#include "hw_fence/sun-hw-fence.dtsi"
|
||||
|
||||
/ {
|
||||
model = "Qualcomm Technologies, Inc. Sun RCM V8 Power Grid";
|
||||
compatible = "qcom,sun-rcm", "qcom,sun", "qcom,sunp-rcm", "qcom,sunp", "qcom,rcm";
|
||||
qcom,msm-id = <618 0x10000>, <618 0x20000>;
|
||||
qcom,board-id = <0x30015 0>;
|
||||
};
|
||||
Reference in New Issue
Block a user