ARM: dts: msm: add support for bt swr driver nodes

Add support for lpass bt soundwire driver nodes.

Signed-off-by: Vangala, Amarnath <quic_avangala@quicinc.com>
Change-Id: I69c3091f12c41eb9d7d9ae3716c972ab1d492bb0

sun-audio-overlay.dtsi

@@ -360,6 +360,33 @@
 
 };
 
+&lpass_bt_swr {
+	clock-names = "bt_swr_mclk_clk", "bt_swr_mclk_clk_2x",
+			"lpass_core_hw_vote", "lpass_audio_hw_vote";
+	clocks = <&clock_audio_bt_swr_mclk_clk 0>, <&clock_audio_bt_swr_mclk_clk_2x 0>,
+			<&lpass_core_hw_vote 0>, <&lpass_audio_hw_vote 0>;
+	qcom,bt-swr-gpios = <&bt_swr_gpios>;
+
+	swr4: bt_swr_mstr {
+		compatible = "qcom,swr-mstr";
+		qcom,swr_master_id = <5>;
+		clock-names = "lpass_core_hw_vote",
+				"lpass_audio_hw_vote";
+		clocks = <&lpass_core_hw_vote 0>,
+				<&lpass_audio_hw_vote 0>;
+		swrm-io-base = <0x06CA0000 0x0>;
+		interrupts = <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>;
+		interrupt-names = "swr_master_irq";
+		qcom,swr-num-ports = <7>;
+		qcom,swr-port-mapping = <1 BT_AUDIO_RX1 0x3>,
+			<2 BT_AUDIO_RX2 0x3>, <3 BT_AUDIO_RX3 0x3>,
+			<5 BT_AUDIO_TX1 0x3>, <6 BT_AUDIO_TX2 0x3>,
+			<7 BT_AUDIO_TX3 0x3>, <8 FM_AUDIO_TX1 0x3>;
+		qcom,swr-num-dev = <1>;
+		qcom,swr-clock-stop-mode0 = <1>;
+	};
+};
+
 &spf_core_platform  {
 	sun_snd: sound {
 		qcom,model = "sun-mtp-snd-card";
@@ -665,6 +692,15 @@
 		qcom,tlmm-pins = <182>;
 		#gpio-cells = <0>;
 	};
+
+	bt_swr_gpios: bt_swr_clk_data_pinctrl {
+		compatible = "qcom,msm-cdc-pinctrl";
+		pinctrl-names = "aud_active", "aud_sleep";
+		pinctrl-0 = <&bt_swr_clk_active &bt_swr_data_active>;
+		pinctrl-1 = <&bt_swr_clk_sleep &bt_swr_data_sleep>;
+		qcom,lpi-gpios;
+		#gpio-cells = <0>;
+		};
 };
 
 &soc {
@@ -762,4 +798,20 @@
 		qcom,codec-lpass-clk-id = <0x318>;
 		#clock-cells = <1>;
 	};
+
+	clock_audio_bt_swr_mclk_clk: bt_swr_mclk_clk {
+		compatible = "qcom,audio-ref-clk";
+		qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_15>;
+		qcom,codec-lpass-ext-clk-freq = <24576000>;
+		qcom,codec-lpass-clk-id = <0x31A>;
+		#clock-cells = <1>;
+	};
+
+	clock_audio_bt_swr_mclk_clk_2x: bt_swr_mclk_clk_2x {
+		compatible = "qcom,audio-ref-clk";
+		qcom,codec-ext-clk-src = <AUDIO_LPASS_MCLK_16>;
+		qcom,codec-lpass-ext-clk-freq = <24576000>;
+		qcom,codec-lpass-clk-id = <0x31B>;
+		#clock-cells = <1>;
+	};
 };

sun-audio.dtsi

@@ -151,6 +151,12 @@
 		};
 	};
 
+	lpass_bt_swr: lpass_bt_swr@6CA0000 {
+		compatible = "qcom,lpass-bt-swr";
+		swr4: bt_swr_mstr {
+		};
+	};
+
 	sun_snd: sound {
 		compatible = "qcom,sun-asoc-snd";
 		qcom,mi2s-audio-intf = <1>;
@@ -170,4 +176,5 @@
 	swr1 = "/soc/spf_core_platform/lpass-cdc/rx-macro@6AC0000/rx_swr_master";
 	swr2 = "/soc/spf_core_platform/lpass-cdc/va-macro@6D44000/va_swr_master";
 	swr3 = "/soc/spf_core_platform/lpass-cdc/wsa2-macro@6AA0000/wsa2_swr_master";
+	swr4 = "/soc/spf_core_platform/lpass_bt_swr/bt_swr_mstr";
 };

sun-lpi.dtsi

@@ -1984,6 +1984,66 @@
 		};
 	};
 
+	bt_swr_clk_pin {
+		bt_swr_clk_sleep: bt_swr_clk_sleep {
+			mux {
+				pins = "gpio19";
+				function = "func3";
+			};
+
+			config {
+				pins = "gpio19";
+				drive-strength = <2>;
+				input-enable;
+				bias-pull-down;
+			};
+		};
+
+		bt_swr_clk_active: bt_swr_clk_active {
+			mux {
+				pins = "gpio19";
+				function = "func3";
+			};
+
+			config {
+				pins = "gpio19";
+				drive-strength = <2>;
+				slew-rate = <1>;
+				bias-disable;
+			};
+		};
+	};
+
+	bt_swr_data_pin {
+		bt_swr_data_sleep: bt_swr_data_sleep {
+			mux {
+				pins = "gpio20";
+				function = "func3";
+			};
+
+			config {
+				pins = "gpio20";
+				drive-strength = <2>;
+				input-enable;
+				bias-pull-down;
+			};
+		};
+
+		bt_swr_data_active: bt_swr_data_active {
+			mux {
+				pins = "gpio20";
+				function = "func3";
+			};
+
+			config {
+				pins = "gpio20";
+				drive-strength = <2>;
+				slew-rate = <1>;
+				bias-bus-hold;
+			};
+		};
+	};
+
 	wsa_swr_clk_pin {
 		wsa_swr_clk_sleep: wsa_swr_clk_sleep {
 			mux {