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Merge "ARM: dts: qcom: Add initial Thermal configuration for tuna"

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QCTECMDR Service
2024-10-07 18:58:41 -07:00
committed by Gerrit - the friendly Code Review server
parent 57d5cf1870 e30408130e
commit f1509ef26e
3 changed files with 1790 additions and 0 deletions
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16
qcom/tuna-rumi.dtsi
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@@ -174,3 +174,19 @@
&APSS_OFF {
status = "disabled";
};
&tsens0 {
status = "disabled";
};
&tsens1 {
status = "disabled";
};
&tsens2 {
status = "disabled";
};
&tsens3 {
status = "disabled";
};

1765
qcom/tuna-thermal.dtsi Normal file
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9
qcom/tuna.dtsi
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@@ -91,6 +91,7 @@
cpu-idle-states = <&GOLD_OFF_CL0 &GOLD_RAIL_OFF_CL0>;
power-domains = <&CPU_PD0>;
power-domain-names = "psci";
#cooling-cells = <2>;
cpu-release-addr = <0x0 0xE3940000>;
next-level-cache = <&L2_0>;
capacity-dmips-mhz = <1024>;
@@ -115,6 +116,7 @@
cpu-idle-states = <&GOLD_OFF_CL0 &GOLD_RAIL_OFF_CL0>;
power-domains = <&CPU_PD1>;
power-domain-names = "psci";
#cooling-cells = <2>;
cpu-release-addr = <0x0 0xE3940000>;
next-level-cache = <&L2_1>;
capacity-dmips-mhz = <1024>;
@@ -135,6 +137,7 @@
cpu-idle-states = <&GOLD_OFF_CL1 &GOLD_RAIL_OFF_CL1>;
power-domains = <&CPU_PD2>;
power-domain-names = "psci";
#cooling-cells = <2>;
cpu-release-addr = <0x0 0xE3940000>;
next-level-cache = <&L2_2>;
capacity-dmips-mhz = <1024>;
@@ -154,6 +157,7 @@
cpu-idle-states = <&GOLD_OFF_CL1 &GOLD_RAIL_OFF_CL1>;
power-domains = <&CPU_PD3>;
power-domain-names = "psci";
#cooling-cells = <2>;
cpu-release-addr = <0x0 0xE3940000>;
next-level-cache = <&L2_3>;
capacity-dmips-mhz = <1024>;
@@ -173,6 +177,7 @@
cpu-idle-states = <&GOLD_OFF_CL1 &GOLD_RAIL_OFF_CL1>;
power-domains = <&CPU_PD4>;
power-domain-names = "psci";
#cooling-cells = <2>;
cpu-release-addr = <0x0 0xE3940000>;
next-level-cache = <&L2_4>;
capacity-dmips-mhz = <1024>;
@@ -192,6 +197,7 @@
cpu-idle-states = <&GOLD_OFF_CL2 &GOLD_RAIL_OFF_CL2>;
power-domains = <&CPU_PD5>;
power-domain-names = "psci";
#cooling-cells = <2>;
cpu-release-addr = <0x0 0xE3940000>;
next-level-cache = <&L2_5>;
capacity-dmips-mhz = <1024>;
@@ -211,6 +217,7 @@
cpu-idle-states = <&GOLD_OFF_CL2 &GOLD_RAIL_OFF_CL2>;
power-domains = <&CPU_PD6>;
power-domain-names = "psci";
#cooling-cells = <2>;
cpu-release-addr = <0x0 0xE3940000>;
next-level-cache = <&L2_6>;
capacity-dmips-mhz = <1024>;
@@ -230,6 +237,7 @@
cpu-idle-states = <&GOLD_PLUS_OFF &GOLD_PLUS_RAIL_OFF>;
power-domains = <&CPU_PD7>;
power-domain-names = "psci";
#cooling-cells = <2>;
cpu-release-addr = <0x0 0xE3940000>;
next-level-cache = <&L2_7>;
capacity-dmips-mhz = <1300>;
@@ -2681,6 +2689,7 @@
#include "msm-rdbg.dtsi"
#include "tuna-pmic-overlay.dtsi"
#include "tuna-walt.dtsi"
#include "tuna-thermal.dtsi"
&qupv3_se7_2uart {
status = "ok";