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ARM: dts: msm: Update PHY timings for CMD VTDR panels on Kera CDP/RCM

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This update adjusts the PHY timings for the VTDR command mode panel on
Kera RCM/CDP platforms based on the required FPS, following the removal
of the qcom,mdss-dsi-panel-clockrate hardcoding. Previously, the
hardcoding resulted in uniform panel PHY timings across all FPS.

Some Kera RCMs have exhibited screen freeze issues when switching from
120 FPS to 60 FPS in command mode after the removal of the hardcoded
clock rate. Interestingly, this issue has not been observed on Kera
CDPs and other platforms, suggesting potential underlying hardware
differences between CDPs and RCMs that necessitate proper tuning of
panel PHY timings.

Update the panel PHY timings to fix this.

Fixes: I1c3c77eed76 ("ARM: dts: msm: remove hard coded panel clk rate
for kera RCM").

Change-Id: Iffd1d5da485d6961baa49ff96a65882c491a8ff6
Signed-off-by: Abhinav Saurabh <quic_abhisaur@quicinc.com>
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
This commit is contained in:
Abhinav Saurabh
2025-02-25 17:23:17 +05:30
committed by lnxdisplay
parent f61c034cdf
commit ede1e06af1
1 changed files with 12 additions and 0 deletions
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12
display/kera-sde-display-cdp.dtsi
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@@ -67,14 +67,20 @@
timing@1 { timing@1 {
/delete-property/ qcom,mdss-dsi-panel-clockrate; /delete-property/ qcom,mdss-dsi-panel-clockrate;
qcom,mdss-dsi-panel-phy-timings = [00 1c 08 07 17 22 07
07 08 02 04 00 19 0c];
}; };
timing@2 { timing@2 {
/delete-property/ qcom,mdss-dsi-panel-clockrate; /delete-property/ qcom,mdss-dsi-panel-clockrate;
qcom,mdss-dsi-panel-phy-timings = [00 13 05 04 13 1e 05
05 06 02 04 00 12 0a];
}; };
timing@3 { timing@3 {
/delete-property/ qcom,mdss-dsi-panel-clockrate; /delete-property/ qcom,mdss-dsi-panel-clockrate;
qcom,mdss-dsi-panel-phy-timings = [00 0f 03 03 11 1d 04
04 03 02 04 00 0d 09];
}; };
}; };
}; };
@@ -111,10 +117,14 @@
timing@1 { timing@1 {
/delete-property/ qcom,mdss-dsi-panel-clockrate; /delete-property/ qcom,mdss-dsi-panel-clockrate;
qcom,mdss-dsi-panel-phy-timings = [00 13 05 04 13 1e 05
05 06 02 04 00 12 0a];
}; };
timing@2 { timing@2 {
/delete-property/ qcom,mdss-dsi-panel-clockrate; /delete-property/ qcom,mdss-dsi-panel-clockrate;
qcom,mdss-dsi-panel-phy-timings = [00 0f 03 03 11 1d 04
04 03 02 04 00 0d 09];
}; };
}; };
}; };
@@ -151,6 +161,8 @@
timing@1 { timing@1 {
/delete-property/ qcom,mdss-dsi-panel-clockrate; /delete-property/ qcom,mdss-dsi-panel-clockrate;
qcom,mdss-dsi-panel-phy-timings = [00 0f 03 03 11 1d 04
04 03 02 04 00 0d 09];
}; };
}; };
}; };