From ab05b35d77d9c5bcec37f22f4b176cab5fb37ebc Mon Sep 17 00:00:00 2001
From: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
Date: Fri, 27 Dec 2024 22:13:53 +0530
Subject: [PATCH] ARM: dts: msm: tuna: Add USB_AXI clock for programming USB
 QoS

Add USB AXI clock handle for accessing USB QoS register to program QoS.

Change-Id: I4e0a0057e55283578ab6333f0da1b46c36e01fe5
Signed-off-by: Raviteja Laggyshetty <quic_rlaggysh@quicinc.com>
---
 qcom/tuna.dtsi | 1 +
 1 file changed, 1 insertion(+)

diff --git a/qcom/tuna.dtsi b/qcom/tuna.dtsi
index 4b16ef83..10b4c359 100644
--- a/qcom/tuna.dtsi
+++ b/qcom/tuna.dtsi
@@ -2281,6 +2281,7 @@
 		#interconnect-cells = <1>;
 		qcom,bcm-voter-names = "hlos";
 		qcom,bcm-voters = <&apps_bcm_voter>;
+		clocks = <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>;
 	};
 
 	aggre2_noc: interconnect@1700000 {