diff --git a/bindings/icnss-wlan.yaml b/bindings/icnss-wlan.yaml index 9801cf83..89a9ea41 100644 --- a/bindings/icnss-wlan.yaml +++ b/bindings/icnss-wlan.yaml @@ -86,6 +86,9 @@ properties: qcom,smp2p_map_wlan_1_in: description: Represents the in smp2p to wlan driver from modem. + pin-ctrl-support: + description: Represents pin_ctrl support is present or not. + required: - compatible - reg diff --git a/canoe-kiwi-cnss.dtsi b/canoe-kiwi-cnss.dtsi index 1068fdcc..7f6bc1d1 100644 --- a/canoe-kiwi-cnss.dtsi +++ b/canoe-kiwi-cnss.dtsi @@ -1,7 +1,7 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include @@ -92,9 +92,9 @@ qcom,qmp = <&aoss_qmp>; vdd-wlan-aon-supply = <&L2G>; - qcom,vdd-wlan-aon-config = <1800000 1800000 0 0 1>; + qcom,vdd-wlan-aon-config = <1800000 1800000 30000 0 1>; vdd-wlan-io12-supply = <&L3G>; - qcom,vdd-wlan-io12-config = <1200000 1200000 0 0 1>; + qcom,vdd-wlan-io12-config = <1200000 1200000 30000 0 1>; vdd-wlan-cx-supply = <&S1J>; qcom,vdd-wlan-cx-config = <968000 1000000 0 0 1>; vdd-wlan-dig-supply = <&S2J>; diff --git a/kera-cdp-qca6750.dts b/kera-cdp-qca6750.dts index bae28946..3af64591 100644 --- a/kera-cdp-qca6750.dts +++ b/kera-cdp-qca6750.dts @@ -1,6 +1,6 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ /dts-v1/; @@ -12,5 +12,5 @@ model = "Qualcomm Technologies, Inc. Kera CDP"; compatible = "qcom,kera-cdp", "qcom,kera", "qcom,cdp"; qcom,msm-id = <686 0x10000>, <659 0x10000>; - qcom,board-id = <0x010001 0>, <0x020001 0>, <0x030001 0>, <0x040001 0>; + qcom,board-id = <0x010001 0>, <0x020001 0>, <0x030001 0>, <0x040001 0>, <0x50001 0>; }; diff --git a/kera-qca6750.dtsi b/kera-qca6750.dtsi index dbe02508..fcbb278c 100644 --- a/kera-qca6750.dtsi +++ b/kera-qca6750.dtsi @@ -6,6 +6,15 @@ #include +&tlmm { + icnss_sw_ctrl: icnss_sw_ctrl { + mux { + pins = "gpio81"; + function = "wcn_sw_ctrl"; + }; + }; +}; + &soc { qcom,smp2p-wpss { smp2p_wlan_1_in: qcom,smp2p-wlan-1-in { @@ -46,7 +55,12 @@ wlan-en-gpio = <35>; host-sol-gpio = <33>; dev-sol-gpio = <32>; - wlan-sw-ctrl-gpio = <81>; + sw-ctrl-gpio = <81>; + /* List of GPIOs to be setup for interrupt wakeup capable */ + mpm_wake_set_gpios = <81>; + pinctrl-names = "sw_ctrl"; + pinctrl-0 = <&icnss_sw_ctrl>; + interrupts = , , , @@ -85,9 +99,11 @@ qcom,iommu-dma-addr-pool = <0xb0000000 0x10000000>; qcom,iommu-geometry = <0xb0000000 0x10010000>; dma-coherent; + pin-ctrl-support; qcom,fw-prefix; qcom,wlan; tsens = "sys-therm-3"; + wcn-hw-version = "qca6750"; qcom,wlan-msa-fixed-region = <&wlan_msa_mem>; vdd-cx-mx-supply = <&S3B>; diff --git a/kera-wcn7750.dtsi b/kera-wcn7750.dtsi index 4ab7aeaa..e043257f 100644 --- a/kera-wcn7750.dtsi +++ b/kera-wcn7750.dtsi @@ -1,12 +1,21 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include #include +&tlmm { + icnss_sw_ctrl: icnss_sw_ctrl { + mux { + pins = "gpio81"; + function = "wcn_sw_ctrl"; + }; + }; +}; + &soc { qcom,smp2p-wpss { smp2p_wlan_1_in: qcom,smp2p-wlan-1-in { @@ -58,7 +67,12 @@ wlan-en-gpio = <35>; host-sol-gpio = <33>; dev-sol-gpio = <32>; - wlan-sw-ctrl-gpio = <81>; + sw-ctrl-gpio = <81>; + /* List of GPIOs to be setup for interrupt wakeup capable */ + mpm_wake_set_gpios = <81>; + pinctrl-names = "sw_ctrl"; + pinctrl-0 = <&icnss_sw_ctrl>; + interrupts = , , , @@ -94,9 +108,11 @@ qcom,iommu-group = <&icnss2_direct_link_iommu_group0>; dma-coherent; + pin-ctrl-support; qcom,fw-prefix; qcom,wlan; tsens = "sys-therm-3"; + wcn-hw-version = "wcn7750"; qcom,wlan-msa-fixed-region = <&wlan_msa_mem>; vdd-cx-mx-supply = <&S3B>; diff --git a/tuna-wcn7750.dtsi b/tuna-wcn7750.dtsi index 968519f2..ba7a33f3 100644 --- a/tuna-wcn7750.dtsi +++ b/tuna-wcn7750.dtsi @@ -1,12 +1,21 @@ // SPDX-License-Identifier: BSD-3-Clause /* - * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved. */ #include #include +&tlmm { + icnss_sw_ctrl: icnss_sw_ctrl { + mux { + pins = "gpio80"; + function = "wcn_sw_ctrl"; + }; + }; +}; + &soc { qcom,smp2p-wpss { smp2p_wlan_1_in: qcom,smp2p-wlan-1-in { @@ -54,7 +63,12 @@ wlan-en-gpio =<35>; host-sol-gpio =<132>; dev-sol-gpio =<32>; - wlan-sw-ctrl-gpio =<80>; + sw-ctrl-gpio =<80>; + /* List of GPIOs to be setup for interrupt wakeup capable */ + mpm_wake_set_gpios = <80>; + pinctrl-names = "sw_ctrl"; + pinctrl-0 = <&icnss_sw_ctrl>; + interrupts = , , , @@ -90,19 +104,23 @@ qcom,iommu-group = <&icnss2_direct_link_iommu_group0>; dma-coherent; + pin-ctrl-support; qcom,fw-prefix; qcom,wlan; tsens = "sys-therm-3"; + wcn-hw-version = "wcn7750"; qcom,wlan-msa-fixed-region = <&wlan_msa_mem>; vdd-cx-mx-supply = <&S3B>; - qcom,vdd-cx-mx-config = <880000 1040000 0 0 0>; + qcom,vdd-cx-mx-config = <864000 1040000 0 0 0>; vdd-1.8-xo-supply = <&S1B>; - qcom,vdd-1.8-xo-config = <1856000 2104000 0 0 0>; + qcom,vdd-1.8-xo-config = <1840000 2104000 0 0 0>; vdd-1.3-rfa-supply = <&S2B>; - qcom,vdd-1.3-rfa-config = <1256000 1408000 0 0 0>; + qcom,vdd-1.3-rfa-config = <1240000 1408000 0 0 0>; vdd-1.8-io-supply = <&L3G>; qcom,vdd-1.8-io-config = <1800000 1800000 0 0 0>; + vdd-1.2-io-supply = <&L2G>; + qcom,vdd-1.2-io-config = <1200000 1200000 0 0 0>; qcom,smem-states = <&smp2p_wlan_1_out 0>, <&smp2p_wlan_2_out 0>, @@ -132,12 +150,12 @@ <30000 400000>, /* high: 240-1200 Mbps snoc/anoc: 100 Mhz */ <100000 400000>, - /* very high: > 1200 Mbps snoc/anoc: 403 Mhz */ - <175000 1612000>, - /* ultra high: DBS mode snoc/anoc: 403 Mhz */ - <312500 1612000>, - /* super high: DBS mode snoc/anoc: 533 Mhz */ - <587500 2171000>, + /* very high: > 1200 Mbps snoc/anoc: 200 Mhz */ + <175000 800000>, + /* ultra high: DBS mode snoc/anoc: 200 Mhz */ + <312500 800000>, + /* super high: DBS mode snoc/anoc: 403 Mhz */ + <587500 1612000>, /* low (latency critical): 18-60 Mbps snoc/anoc: 200 Mhz */ <7500 800000>,