ARM: dts: msm: Add snapshot of pineapple device tree
Add snapshot of pineapple device tree files as of devicetree/qcom-6.1
commit 8bc1219b2b23 ("Merge "ARM: dts: msm: update memlat tables for
pineapple"").
Change-Id: If62ee45b1f3e7e8a5744f25b8c67a9768950c960
Signed-off-by: Mukesh Ojha <quic_mojha@quicinc.com>
This commit is contained in:
Mukesh Ojha
237
qcom/pmk8550.dtsi
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237
qcom/pmk8550.dtsi
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// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/spmi/spmi.h>
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#include <dt-bindings/iio/qcom,spmi-adc5-gen3-pmk8550.h>
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#include <dt-bindings/iio/qcom,spmi-adc5-gen3-pm8550.h>
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#include <dt-bindings/iio/qcom,spmi-adc5-gen3-pm8550b.h>
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#define PM8550VE_SID 8
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#include <dt-bindings/iio/qcom,spmi-adc5-gen3-pm8550vx.h>
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&spmi_bus {
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#address-cells = <2>;
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#size-cells = <0>;
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interrupt-controller;
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#interrupt-cells = <4>;
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qcom,pmk8550@0 {
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compatible = "qcom,spmi-pmic";
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reg = <0x0 SPMI_USID>;
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#address-cells = <1>;
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#size-cells = <0>;
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pmk8550_sdam_1: sdam@7000 {
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compatible = "qcom,spmi-sdam";
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reg = <0x7000>;
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#address-cells = <1>;
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#size-cells = <1>;
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ocp_log: ocp-log@76 {
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reg = <0x76 0x6>;
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};
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};
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pmk8550_sdam_2: sdam@7100 {
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compatible = "qcom,spmi-sdam";
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reg = <0x7100>;
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#address-cells = <1>;
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#size-cells = <1>;
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restart_reason: restart@48 {
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reg = <0x48 0x1>;
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bits = <1 7>;
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};
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alarm_log: alarm-log@76 {
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reg = <0x76 0x6>;
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};
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};
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pmk8550_sdam_5: sdam@7400 {
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compatible = "qcom,spmi-sdam";
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reg = <0x7400>;
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};
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pmk8550_sdam_6: sdam@7500 {
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compatible = "qcom,spmi-sdam";
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reg = <0x7500>;
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};
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pmk8550_sdam_21: sdam@8400 {
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compatible = "qcom,spmi-sdam";
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reg = <0x8400>;
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};
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pmk8550_sdam_22: sdam@8500 {
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compatible = "qcom,spmi-sdam";
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reg = <0x8500>;
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};
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pon_hlos@1300 {
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compatible = "qcom,pm8998-pon";
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reg = <0x1300>, <0x800>;
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reg-names = "pon_hlos", "pon_pbs";
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pwrkey {
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compatible = "qcom,pmk8350-pwrkey";
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interrupts = <0x0 0x13 0x7 IRQ_TYPE_EDGE_BOTH>;
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linux,code = <KEY_POWER>;
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};
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resin {
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compatible = "qcom,pmk8350-resin";
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interrupts = <0x0 0x13 0x6 IRQ_TYPE_EDGE_BOTH>;
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linux,code = <KEY_VOLUMEDOWN>;
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};
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};
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pmk8550_gpios: pinctrl@b800 {
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compatible = "qcom,pmk8550-gpio";
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reg = <0xb800>;
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gpio-controller;
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#gpio-cells = <2>;
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interrupt-controller;
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#interrupt-cells = <2>;
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};
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pmk8550_rtc: rtc@6100 {
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compatible = "qcom,pmk8350-rtc";
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reg = <0x6100>, <0x6200>;
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reg-names = "rtc", "alarm";
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interrupts = <0x0 0x62 0x1 IRQ_TYPE_EDGE_RISING>;
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};
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pmk8550_vadc: vadc@9000 {
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compatible = "qcom,spmi-adc5-gen3";
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reg = <0x9000>, <0x9100>;
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#address-cells = <1>;
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#size-cells = <0>;
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interrupt-names = "adc-sdam0", "adc-sdam1";
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interrupts = <0x0 0x90 0x1 IRQ_TYPE_EDGE_RISING>,
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<0x0 0x91 0x1 IRQ_TYPE_EDGE_RISING>;
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#thermal-sensor-cells = <1>;
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#io-channel-cells = <1>;
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io-channel-ranges;
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/* PMK8550 Channel nodes */
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pmk8550_offset_ref {
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reg = <PMK8550_ADC5_GEN3_OFFSET_REF>;
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label = "pmk8550_offset_ref";
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qcom,pre-scaling = <1 1>;
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};
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pmk8550_vref_1p25 {
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reg = <PMK8550_ADC5_GEN3_1P25VREF>;
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label = "pmk8550_vref_1p25";
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qcom,pre-scaling = <1 1>;
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};
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pmk8550_die_temp {
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reg = <PMK8550_ADC5_GEN3_DIE_TEMP>;
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label = "pmk8550_die_temp";
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qcom,pre-scaling = <1 1>;
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};
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/* PM8550 Channel nodes */
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pm8550_offset_ref {
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reg = <PM8550_ADC5_GEN3_OFFSET_REF>;
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label = "pm8550_offset_ref";
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qcom,pre-scaling = <1 1>;
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};
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pm8550_vref_1p25 {
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reg = <PM8550_ADC5_GEN3_1P25VREF>;
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label = "pm8550_vref_1p25";
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qcom,pre-scaling = <1 1>;
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};
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pm8550_die_temp {
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reg = <PM8550_ADC5_GEN3_DIE_TEMP>;
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label = "pm8550_die_temp";
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qcom,pre-scaling = <1 1>;
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};
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pm8550_vph_pwr {
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reg = <PM8550_ADC5_GEN3_VPH_PWR>;
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label = "pm8550_vph_pwr";
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qcom,pre-scaling = <1 3>;
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};
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/* PM8550B Channel nodes */
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pm8550b_offset_ref {
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reg = <PM8550B_ADC5_GEN3_OFFSET_REF>;
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label = "pm8550b_offset_ref";
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qcom,pre-scaling = <1 1>;
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};
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pm8550b_vref_1p25 {
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reg = <PM8550B_ADC5_GEN3_1P25VREF>;
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label = "pm8550b_vref_1p25";
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qcom,pre-scaling = <1 1>;
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};
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pm8550b_die_temp {
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reg = <PM8550B_ADC5_GEN3_DIE_TEMP>;
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label = "pm8550b_die_temp";
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qcom,pre-scaling = <1 1>;
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};
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pm8550b_lite_die_temp {
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reg = <PM8550B_ADC5_GEN3_TEMP_ALARM_LITE>;
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label = "pm8550b_lite_die_temp";
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qcom,pre-scaling = <1 1>;
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};
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pm8550b_vph_pwr {
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reg = <PM8550B_ADC5_GEN3_VPH_PWR>;
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label = "pm8550b_vph_pwr";
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qcom,pre-scaling = <1 3>;
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};
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pm8550b_vbat_sns_qbg {
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reg = <PM8550B_ADC5_GEN3_VBAT_SNS_QBG>;
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label = "pm8550b_vbat_sns_qbg";
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qcom,pre-scaling = <1 3>;
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};
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/* PM8550VS_C Channel nodes */
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pm8550vs_c_die_temp {
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reg = <PM8550VS_C_ADC5_GEN3_DIE_TEMP>;
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label = "pm8550vs_c_die_temp";
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qcom,pre-scaling = <1 1>;
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};
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/* PM8550VS_D Channel nodes */
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pm8550vs_d_die_temp {
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reg = <PM8550VS_D_ADC5_GEN3_DIE_TEMP>;
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label = "pm8550vs_d_die_temp";
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qcom,pre-scaling = <1 1>;
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};
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/* PM8550VS_E Channel nodes */
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pm8550vs_e_die_temp {
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reg = <PM8550VS_E_ADC5_GEN3_DIE_TEMP>;
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label = "pm8550vs_e_die_temp";
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qcom,pre-scaling = <1 1>;
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};
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/* PM8550VS_G Channel nodes */
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pm8550vs_g_die_temp {
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reg = <PM8550VS_G_ADC5_GEN3_DIE_TEMP>;
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label = "pm8550vs_g_die_temp";
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qcom,pre-scaling = <1 1>;
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};
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/* PM8550VE Channel nodes */
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pm8550ve_die_temp {
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reg = <PM8550VE_ADC5_GEN3_DIE_TEMP>;
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label = "pm8550ve_die_temp";
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qcom,pre-scaling = <1 1>;
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};
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};
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};
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};
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