From e8ed46620fc8aa4629ccecb7475faf8db1c9f035 Mon Sep 17 00:00:00 2001 From: Prakash Yadachi Date: Tue, 2 Jul 2024 12:41:44 +0530 Subject: [PATCH] ARM: dts: msm: Add interconnect-names for Ravelin Add interconnect-names qup-core,qup-config and qup-memory to all qupv3 nodes. Signed-off-by: Prakash Yadachi Signed-off-by: Bruce Levy Change-Id: I1b8404e95bbb171847295705b3a10f942d703221 --- qcom/ravelin-qupv3.dtsi | 32 ++++++++++++++++---------------- 1 file changed, 16 insertions(+), 16 deletions(-) diff --git a/qcom/ravelin-qupv3.dtsi b/qcom/ravelin-qupv3.dtsi index d4e78382..f7e8c262 100644 --- a/qcom/ravelin-qupv3.dtsi +++ b/qcom/ravelin-qupv3.dtsi @@ -103,7 +103,7 @@ reg = <0x980000 0x4000>; reg-names = "se_phys"; interrupts = ; - interconnect-names = "qup-core", "snoc-llcc", "qup-ddr"; + interconnect-names = "qup-core", "qup-config", "qup-memory"; interconnects = <&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>, <&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>, @@ -122,7 +122,7 @@ #address-cells = <1>; #size-cells = <0>; interrupts = ; - interconnect-names = "qup-core", "snoc-llcc", "qup-ddr"; + interconnect-names = "qup-core", "qup-config", "qup-memory"; interconnects = <&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>, <&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>, @@ -143,7 +143,7 @@ reg = <0x984000 0x4000>; #address-cells = <1>; #size-cells = <0>; - interconnect-names = "qup-core", "snoc-llcc", "qup-ddr"; + interconnect-names = "qup-core", "qup-config", "qup-memory"; interconnects = <&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>, <&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>, @@ -167,7 +167,7 @@ #size-cells = <0>; reg-names = "se_phys"; interrupts = ; - interconnect-names = "qup-core", "snoc-llcc", "qup-ddr"; + interconnect-names = "qup-core", "qup-config", "qup-memory"; interconnects = <&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>, <&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>, @@ -190,7 +190,7 @@ reg = <0x98c000 0x4000>; #address-cells = <1>; #size-cells = <0>; - interconnect-names = "qup-core", "snoc-llcc", "qup-ddr"; + interconnect-names = "qup-core", "qup-config", "qup-memory"; interconnects = <&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>, <&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>, @@ -214,7 +214,7 @@ #size-cells = <0>; reg-names = "se_phys"; interrupts = ; - interconnect-names = "qup-core", "snoc-llcc", "qup-ddr"; + interconnect-names = "qup-core", "qup-config", "qup-memory"; interconnects = <&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>, <&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>, @@ -238,7 +238,7 @@ #address-cells = <1>; #size-cells = <0>; interrupts = ; - interconnect-names = "qup-core", "snoc-llcc", "qup-ddr"; + interconnect-names = "qup-core", "qup-config", "qup-memory"; interconnects = <&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>, <&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>, @@ -261,7 +261,7 @@ #size-cells = <0>; reg-names = "se_phys"; interrupts = ; - interconnect-names = "qup-core", "snoc-llcc", "qup-ddr"; + interconnect-names = "qup-core", "qup-config", "qup-memory"; interconnects = <&clk_virt MASTER_QUP_CORE_0 &clk_virt SLAVE_QUP_CORE_0>, <&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>, @@ -350,7 +350,7 @@ #address-cells = <1>; #size-cells = <0>; interrupts = ; - interconnect-names = "qup-core", "snoc-llcc", "qup-ddr"; + interconnect-names = "qup-core", "qup-config", "qup-memory"; interconnects = <&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>, <&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>, @@ -373,7 +373,7 @@ #size-cells = <0>; reg-names = "se_phys"; interrupts = ; - interconnect-names = "qup-core", "snoc-llcc", "qup-ddr"; + interconnect-names = "qup-core", "qup-config", "qup-memory"; interconnects = <&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>, <&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>, @@ -397,7 +397,7 @@ #address-cells = <1>; #size-cells = <0>; interrupts = ; - interconnect-names = "qup-core", "snoc-llcc", "qup-ddr"; + interconnect-names = "qup-core", "qup-config", "qup-memory"; interconnects = <&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>, <&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>, @@ -420,7 +420,7 @@ #size-cells = <0>; reg-names = "se_phys"; interrupts = ; - interconnect-names = "qup-core", "snoc-llcc", "qup-ddr"; + interconnect-names = "qup-core", "qup-config", "qup-memory"; interconnects = <&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>, <&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>, @@ -444,7 +444,7 @@ #address-cells = <1>; #size-cells = <0>; interrupts = ; - interconnect-names = "qup-core", "snoc-llcc", "qup-ddr"; + interconnect-names = "qup-core", "qup-config", "qup-memory"; interconnects = <&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>, <&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>, @@ -468,7 +468,7 @@ #size-cells = <0>; reg-names = "se_phys"; interrupts = ; - interconnect-names = "qup-core", "snoc-llcc", "qup-ddr"; + interconnect-names = "qup-core", "qup-config", "qup-memory"; interconnects = <&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>, <&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>, @@ -492,7 +492,7 @@ #address-cells = <1>; #size-cells = <0>; interrupts = ; - interconnect-names = "qup-core", "snoc-llcc", "qup-ddr"; + interconnect-names = "qup-core", "qup-config", "qup-memory"; interconnects = <&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>, <&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>, @@ -515,7 +515,7 @@ #size-cells = <0>; reg-names = "se_phys"; interrupts = ; - interconnect-names = "qup-core", "snoc-llcc", "qup-ddr"; + interconnect-names = "qup-core", "qup-config", "qup-memory"; interconnects = <&clk_virt MASTER_QUP_CORE_1 &clk_virt SLAVE_QUP_CORE_1>, <&system_noc MASTER_A2NOC_SNOC &gem_noc SLAVE_LLCC>,