From e8ba29204b695894d17c7711f357f1696415a899 Mon Sep 17 00:00:00 2001
From: Rajeev Nandan <quic_rajeevny@quicinc.com>
Date: Mon, 20 Jan 2025 10:50:02 +0530
Subject: [PATCH] ARM: dts: msm: support 4k sharp panel on Tuna CDP

Support 4k sharp panel on Tuna CDP.

Change-Id: Ifdc1fa4edfe7ac752e1e4d8ab56d4735427d633b
Signed-off-by: Rajeev Nandan <quic_rajeevny@quicinc.com>
Signed-off-by: lnxdisplay <lnxdisplay@localhost>
---
 display/tuna-sde-display-cdp.dtsi    | 18 ++++++++++++
 display/tuna-sde-display-common.dtsi | 44 ++++++++++++++++++++++++++++
 display/tuna-sde-display.dtsi        |  6 +++-
 3 files changed, 67 insertions(+), 1 deletion(-)

diff --git a/display/tuna-sde-display-cdp.dtsi b/display/tuna-sde-display-cdp.dtsi
index 59f78a28..b7f06fd9 100644
--- a/display/tuna-sde-display-cdp.dtsi
+++ b/display/tuna-sde-display-cdp.dtsi
@@ -259,6 +259,24 @@
 	qcom,platform-sec-reset-gpio = <&tlmm 126 0>;
 };
 
+&dsi_sharp_4k_dsc_cmd {
+	qcom,panel-supply-entries = <&dsi_panel_pwr_supply_lcd>;
+	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external";
+	qcom,mdss-dsi-bl-min-level = <1>;
+	qcom,mdss-dsi-bl-max-level = <4095>;
+	qcom,platform-reset-gpio = <&tlmm 14 0>;
+	qcom,platform-bklight-en-gpio = <&pm8550vs_d_gpios 4 0>;
+};
+
+&dsi_sharp_4k_dsc_video {
+	qcom,panel-supply-entries = <&dsi_panel_pwr_supply_lcd>;
+	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external";
+	qcom,mdss-dsi-bl-min-level = <1>;
+	qcom,mdss-dsi-bl-max-level = <4095>;
+	qcom,platform-reset-gpio = <&tlmm 14 0>;
+	qcom,platform-bklight-en-gpio = <&pm8550vs_d_gpios 4 0>;
+};
+
 &dsi_sharp_qhd_plus_dsc_cmd {
 	qcom,panel-supply-entries = <&dsi_panel_pwr_supply_lcd>;
 	qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external";
diff --git a/display/tuna-sde-display-common.dtsi b/display/tuna-sde-display-common.dtsi
index 4598c0e4..f47125d1 100644
--- a/display/tuna-sde-display-common.dtsi
+++ b/display/tuna-sde-display-common.dtsi
@@ -18,6 +18,8 @@
 #include "dsi-panel-nt37801-dsc-fhd-plus-cmd.dtsi"
 #include "dsi-panel-nt37801-dsc-wqhd-plus-cmd-ddicspr.dtsi"
 #include "dsi-panel-nt37801-dsc-wqhd-plus-video-ddicspr.dtsi"
+#include "dsi-panel-sharp-dsc-4k-cmd.dtsi"
+#include "dsi-panel-sharp-dsc-4k-video.dtsi"
 #include "dsi-panel-sharp-dsc-qhd-plus-cmd.dtsi"
 #include "dsi-panel-sharp-dsc-qhd-plus-video.dtsi"
 #include "dsi-panel-sim-cmd-au.dtsi"
@@ -748,6 +750,48 @@
 	};
 };
 
+&dsi_sharp_4k_dsc_cmd {
+	qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
+
+	qcom,mdss-dsi-panel-status-check-mode = "reg_read";
+	qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0c];
+	qcom,mdss-dsi-panel-status-command-state = "dsi_hs_mode";
+	qcom,mdss-dsi-panel-status-value = <0x77>;
+	qcom,mdss-dsi-panel-on-check-value = <0x77>;
+	qcom,mdss-dsi-panel-status-read-length = <1>;
+	qcom,esd-check-enabled;
+
+	qcom,mdss-dsi-display-timings {
+		timing@0 {
+			qcom,mdss-dsi-panel-phy-timings = [00 18 06 06 15 20 06
+				06 07 02 04 00 15 0b];
+			qcom,display-topology = <2 2 2>;
+			qcom,default-topology-index = <0>;
+		};
+	};
+};
+
+&dsi_sharp_4k_dsc_video {
+	qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
+
+	qcom,mdss-dsi-panel-status-check-mode = "reg_read";
+	qcom,mdss-dsi-panel-status-command = [06 01 00 01 00 00 01 0c];
+	qcom,mdss-dsi-panel-status-command-state = "dsi_lp_mode";
+	qcom,mdss-dsi-panel-status-value = <0x77>;
+	qcom,mdss-dsi-panel-on-check-value = <0x77>;
+	qcom,mdss-dsi-panel-status-read-length = <1>;
+	qcom,esd-check-enabled;
+
+	qcom,mdss-dsi-display-timings {
+		timing@0 {
+			qcom,mdss-dsi-panel-phy-timings = [00 18 06 06 15 20 06
+				06 07 02 04 00 15 0b];
+			qcom,display-topology = <2 2 2>;
+			qcom,default-topology-index = <0>;
+		};
+	};
+};
+
 &dsi_sharp_qhd_plus_dsc_cmd {
 	qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
 
diff --git a/display/tuna-sde-display.dtsi b/display/tuna-sde-display.dtsi
index b905f813..402b3d07 100644
--- a/display/tuna-sde-display.dtsi
+++ b/display/tuna-sde-display.dtsi
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: BSD-3-Clause
 /*
- * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2024-2025 Qualcomm Innovation Center, Inc. All rights reserved.
  */
 
 #include <dt-bindings/clock/qcom,dispcc-tuna.h>
@@ -214,6 +214,10 @@
 	};
 };
 
+&dsi_sharp_4k_dsc_cmd {
+	qcom,ulps-enabled;
+};
+
 &dsi_sim_cmd {
 	qcom,ulps-enabled;
 	qcom,mdss-dsi-display-timings {