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ARM: dts: msm: add version property for Trace Noc

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add qcom,interconnect-trace-noc/qcom,trace-noc-v2 property for Trace
Noc on Sun.

Change-Id: I8b990102722565cd9c3ccf4590dd66faa6e3d086
Signed-off-by: Yuanfang Zhang <quic_yuanfang@quicinc.com>
This commit is contained in:
Yuanfang Zhang
2024-05-21 17:07:36 +08:00
parent 6e78904269
commit e7fc8e39ef
1 changed files with 6 additions and 0 deletions
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6
qcom/sun-coresight.dtsi
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@@ -613,6 +613,7 @@
clocks = <&aoss_qmp>; clocks = <&aoss_qmp>;
clock-names = "apb_pclk"; clock-names = "apb_pclk";
qcom,interconnect-trace-noc;
in-ports { in-ports {
#address-cells = <1>; #address-cells = <1>;
@@ -1480,6 +1481,7 @@
status = "disabled"; status = "disabled";
clocks = <&aoss_qmp>; clocks = <&aoss_qmp>;
clock-names = "apb_pclk"; clock-names = "apb_pclk";
qcom,trace-noc-v2;
in-ports { in-ports {
#address-cells = <1>; #address-cells = <1>;
@@ -3711,6 +3713,7 @@
reg-names = "traceNoc-base"; reg-names = "traceNoc-base";
coresight-name = "coresight-tracenoc-ddr"; coresight-name = "coresight-tracenoc-ddr";
qcom,interconnect-trace-noc;
clocks = <&aoss_qmp>; clocks = <&aoss_qmp>;
clock-names = "apb_pclk"; clock-names = "apb_pclk";
@@ -3945,6 +3948,7 @@
clocks = <&aoss_qmp>; clocks = <&aoss_qmp>;
clock-names = "apb_pclk"; clock-names = "apb_pclk";
qcom,interconnect-trace-noc;
in-ports { in-ports {
#address-cells = <1>; #address-cells = <1>;
@@ -3973,6 +3977,7 @@
compatible = "arm,coresight-dummy-source"; compatible = "arm,coresight-dummy-source";
coresight-name = "coresight-lpass-stm"; coresight-name = "coresight-lpass-stm";
trace-name = "lpass-stm"; trace-name = "lpass-stm";
atid = <25>;
out-ports { out-ports {
port@0 { port@0 {
@@ -4481,6 +4486,7 @@
clocks = <&aoss_qmp>; clocks = <&aoss_qmp>;
clock-names = "apb_pclk"; clock-names = "apb_pclk";
qcom,trace-noc-v2;
in-ports { in-ports {
#address-cells = <1>; #address-cells = <1>;