Merge "ARM: dts: msm: correct wsa channel of kera qrd"

This commit is contained in:
QCTECMDR Service
2024-12-05 02:13:31 -08:00
committed by Gerrit - the friendly Code Review server
4 changed files with 12 additions and 14 deletions

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@@ -98,7 +98,7 @@
"TX DMIC3", "MIC BIAS1", "TX DMIC3", "MIC BIAS1",
"IN1_HPHL", "HPHL_OUT", "IN1_HPHL", "HPHL_OUT",
"IN2_HPHR", "HPHR_OUT", "IN2_HPHR", "HPHR_OUT",
"IN3_EAR", "AUX_OUT", "IN3_AUX", "AUX_OUT",
"WSA SRC0_INP", "SRC0", "WSA SRC0_INP", "SRC0",
"WSA_TX DEC0_INP", "TX DEC0 MUX", "WSA_TX DEC0_INP", "TX DEC0 MUX",
"WSA_TX DEC1_INP", "TX DEC1 MUX", "WSA_TX DEC1_INP", "TX DEC1 MUX",
@@ -108,9 +108,7 @@
"RX_TX DEC3_INP", "TX DEC3 MUX", "RX_TX DEC3_INP", "TX DEC3 MUX",
"SpkrLeft IN", "WSA_SPK1 OUT", "SpkrLeft IN", "WSA_SPK1 OUT",
"SpkrRight IN", "WSA_SPK2 OUT", "SpkrRight IN", "WSA_SPK2 OUT",
"TX SWR_INPUT", "WCD_TX_OUTPUT",
"VA SWR_INPUT", "VA_SWR_CLK", "VA SWR_INPUT", "VA_SWR_CLK",
"VA SWR_INPUT", "WCD_TX_OUTPUT",
"VA_AIF1 CAP", "VA_SWR_CLK", "VA_AIF1 CAP", "VA_SWR_CLK",
"VA_AIF2 CAP", "VA_SWR_CLK", "VA_AIF2 CAP", "VA_SWR_CLK",
"VA_AIF3 CAP", "VA_SWR_CLK", "VA_AIF3 CAP", "VA_SWR_CLK",
@@ -118,10 +116,10 @@
"VA DMIC1", "Digital Mic1", "VA DMIC1", "Digital Mic1",
"VA DMIC2", "Digital Mic2", "VA DMIC2", "Digital Mic2",
"VA DMIC3", "Digital Mic3", "VA DMIC3", "Digital Mic3",
"VA DMIC0", "VA MIC BIAS1", "VA DMIC0", "VA MIC BIAS3",
"VA DMIC1", "VA MIC BIAS1", "VA DMIC1", "VA MIC BIAS3",
"VA DMIC2", "VA MIC BIAS3", "VA DMIC2", "VA MIC BIAS1",
"VA DMIC3", "VA MIC BIAS3"; "VA DMIC3", "VA MIC BIAS1";
asoc-codec = <&stub_codec>, <&lpass_cdc>, asoc-codec = <&stub_codec>, <&lpass_cdc>,
<&wcd9378_codec>, <&wcd9378_codec>,
<&wsa884x_0220>, <&wsa884x_0221>; <&wsa884x_0220>, <&wsa884x_0221>;

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@@ -118,7 +118,7 @@
"TX DMIC3", "MIC BIAS1", "TX DMIC3", "MIC BIAS1",
"IN1_HPHL", "HPHL_OUT", "IN1_HPHL", "HPHL_OUT",
"IN2_HPHR", "HPHR_OUT", "IN2_HPHR", "HPHR_OUT",
"IN3_AUX", "AUX_OUT", "IN3_EAR", "AUX_OUT",
"WSA SRC0_INP", "SRC0", "WSA SRC0_INP", "SRC0",
"WSA_TX DEC0_INP", "TX DEC0 MUX", "WSA_TX DEC0_INP", "TX DEC0 MUX",
"WSA_TX DEC1_INP", "TX DEC1 MUX", "WSA_TX DEC1_INP", "TX DEC1 MUX",
@@ -129,8 +129,8 @@
"SpkrLeft IN", "WSA_SPK1 OUT", "SpkrLeft IN", "WSA_SPK1 OUT",
"SpkrRight IN", "WSA_SPK2 OUT", "SpkrRight IN", "WSA_SPK2 OUT",
"TX SWR_INPUT", "WCD_TX_OUTPUT", "TX SWR_INPUT", "WCD_TX_OUTPUT",
"VA SWR_INPUT", "VA_SWR_CLK",
"VA SWR_INPUT", "WCD_TX_OUTPUT", "VA SWR_INPUT", "WCD_TX_OUTPUT",
"VA SWR_INPUT", "VA_SWR_CLK",
"VA_AIF1 CAP", "VA_SWR_CLK", "VA_AIF1 CAP", "VA_SWR_CLK",
"VA_AIF2 CAP", "VA_SWR_CLK", "VA_AIF2 CAP", "VA_SWR_CLK",
"VA_AIF3 CAP", "VA_SWR_CLK", "VA_AIF3 CAP", "VA_SWR_CLK",

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@@ -458,7 +458,7 @@
"RX_TX DEC1_INP", "TX DEC1 MUX", "RX_TX DEC1_INP", "TX DEC1 MUX",
"RX_TX DEC2_INP", "TX DEC2 MUX", "RX_TX DEC2_INP", "TX DEC2 MUX",
"RX_TX DEC3_INP", "TX DEC3 MUX", "RX_TX DEC3_INP", "TX DEC3 MUX",
"SpkrRight IN", "WSA_SPK2 OUT", "SpkrLeft IN", "WSA_SPK1 OUT",
"VA SWR_INPUT", "VA_SWR_CLK", "VA SWR_INPUT", "VA_SWR_CLK",
"VA_AIF1 CAP", "VA_SWR_CLK", "VA_AIF1 CAP", "VA_SWR_CLK",
"VA_AIF2 CAP", "VA_SWR_CLK", "VA_AIF2 CAP", "VA_SWR_CLK",

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@@ -31,11 +31,11 @@
&swr0 { &swr0 {
wsa884x_0220: wsa884x@02170220 { wsa884x_0220: wsa884x@02170220 {
status = "disabled"; status = "okay";
}; };
wsa884x_0221: wsa884x@02170221 { wsa884x_0221: wsa884x@02170221 {
status = "okay"; status = "disabled";
}; };
}; };
@@ -79,8 +79,8 @@
qcom,model = "kera-qrd-snd-card"; qcom,model = "kera-qrd-snd-card";
swr-haptics-unsupported; swr-haptics-unsupported;
asoc-codec = <&stub_codec>, <&lpass_cdc>, asoc-codec = <&stub_codec>, <&lpass_cdc>,
<&wcd9378_codec>, <&wsa884x_0221>; <&wcd9378_codec>, <&wsa884x_0220>;
asoc-codec-names = "msm-stub-codec.1", "lpass-cdc", asoc-codec-names = "msm-stub-codec.1", "lpass-cdc",
"wcd9378_codec", "wsa-codec2"; "wcd9378_codec", "wsa-codec1";
qcom,wsa-max-devs = <1>; qcom,wsa-max-devs = <1>;
}; };