samsung_sm8750/android_kernel_samsung_sm8750-devicetrees
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ARM: dts: msm: Fix the protected clocks for gcc

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Fix the clock handle entries in the protected clocks for gcc on Kera.

Change-Id: I0f7f633b0961fa2dda952fb9b53824aa45968595
Signed-off-by: Anaadi Mishra <quic_anaadim@quicinc.com>
This commit is contained in:
Anaadi Mishra
2025-01-21 16:29:43 +05:30
parent 96fa571cd1
commit e2226e200c
1 changed files with 6 additions and 6 deletions
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12
qcom/kera.dtsi
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@@ -1866,12 +1866,12 @@
"ufs_phy_rx_symbol_1_clk",
"ufs_phy_tx_symbol_0_clk",
"usb3_phy_wrapper_gcc_usb30_pipe_clk";
protected-clocks = <&gcc GCC_PCIE_1_AUX_CLK>, <&gcc GCC_PCIE_1_AUX_CLK_SRC>,
<&gcc GCC_PCIE_1_CFG_AHB_CLK>, <&gcc GCC_PCIE_1_MSTR_AXI_CLK>,
<&gcc GCC_PCIE_1_PHY_RCHNG_CLK>, <&gcc GCC_PCIE_1_PHY_RCHNG_CLK_SRC>,
<&gcc GCC_PCIE_1_PIPE_CLK>, <&gcc GCC_PCIE_1_PIPE_CLK_SRC>,
<&gcc GCC_PCIE_1_PIPE_DIV2_CLK>, <&gcc GCC_PCIE_1_PIPE_DIV2_CLK_SRC>,
<&gcc GCC_PCIE_1_SLV_AXI_CLK>, <&gcc GCC_PCIE_1_SLV_Q2A_AXI_CLK>;
protected-clocks = <GCC_PCIE_1_AUX_CLK>, <GCC_PCIE_1_AUX_CLK_SRC>,
<GCC_PCIE_1_CFG_AHB_CLK>, <GCC_PCIE_1_MSTR_AXI_CLK>,
<GCC_PCIE_1_PHY_RCHNG_CLK>, <GCC_PCIE_1_PHY_RCHNG_CLK_SRC>,
<GCC_PCIE_1_PIPE_CLK>, <GCC_PCIE_1_PIPE_CLK_SRC>,
<GCC_PCIE_1_PIPE_DIV2_CLK>, <GCC_PCIE_1_PIPE_DIV2_CLK_SRC>,
<GCC_PCIE_1_SLV_AXI_CLK>, <GCC_PCIE_1_SLV_Q2A_AXI_CLK>;
#clock-cells = <1>;
#reset-cells = <1>;
};