diff --git a/qcom/Makefile b/qcom/Makefile index 50bec119..811ed5fe 100644 --- a/qcom/Makefile +++ b/qcom/Makefile @@ -130,8 +130,8 @@ parrot-dtb-$(CONFIG_ARCH_PARROT) += \ parrot-overlays-dtb-$(CONFIG_ARCH_PARROT) += $(PARROT_BOARDS) $(PARROT_BASE_DTB) $(PARROT_4GB_BOARDS) $(PARROT_4GB_BASE_DTB) dtb-y += $(parrot-dtb-y) -RAVELIN_BASE_DTB += ravelin.dtb ravelinp.dtb -RAVELIN_4GB_BASE_DTB += ravelin-4gb.dtb ravelinp-4gb.dtb +RAVELIN_BASE_DTB += ravelin.dtb ravelinp.dtb ravelin-sg.dtb ravelinp-sg.dtb +RAVELIN_4GB_BASE_DTB += ravelin-4gb.dtb ravelinp-4gb.dtb ravelin-sg.dtb ravelinp-sg.dtb RAVELIN_BOARDS += \ ravelin-rumi-overlay.dtbo \ diff --git a/qcom/platform_map.bzl b/qcom/platform_map.bzl index deb66a79..79d4aeef 100644 --- a/qcom/platform_map.bzl +++ b/qcom/platform_map.bzl @@ -195,6 +195,8 @@ _platform_map = { {"name": "ravelinp.dtb"}, {"name": "ravelin-4gb.dtb"}, {"name": "ravelinp-4gb.dtb"}, + {"name": "ravelin-sg.dtb"}, + {"name": "ravelinp-sg.dtb"}, ], "dtbo_list": [ # keep sorted diff --git a/qcom/ravelin-atp-overlay.dts b/qcom/ravelin-atp-overlay.dts index 7ea7d64b..afffb52e 100644 --- a/qcom/ravelin-atp-overlay.dts +++ b/qcom/ravelin-atp-overlay.dts @@ -11,6 +11,6 @@ / { model = "Qualcomm Technologies, Inc. Ravelin ATP"; compatible = "qcom,ravelin-atp", "qcom,ravelin", "qcom,atp"; - qcom,msm-id = <568 0x10000>, <602 0x10000>; + qcom,msm-id = <568 0x10000>, <602 0x10000>, <653 0x10000>, <654 0x10000>; qcom,board-id = <33 0>; }; diff --git a/qcom/ravelin-idp-overlay.dts b/qcom/ravelin-idp-overlay.dts index e46b8a1e..e888ce71 100644 --- a/qcom/ravelin-idp-overlay.dts +++ b/qcom/ravelin-idp-overlay.dts @@ -11,6 +11,6 @@ / { model = "Qualcomm Technologies, Inc. Ravelin IDP"; compatible = "qcom,ravelin-idp", "qcom,ravelin", "qcom,idp"; - qcom,msm-id = <568 0x10000>, <602 0x10000>; + qcom,msm-id = <568 0x10000>, <602 0x10000>, <653 0x10000>, <654 0x10000>; qcom,board-id = <34 0>; }; diff --git a/qcom/ravelin-idp-wcn3950-amoled-rcm-overlay.dts b/qcom/ravelin-idp-wcn3950-amoled-rcm-overlay.dts index 8f917453..41248f2a 100644 --- a/qcom/ravelin-idp-wcn3950-amoled-rcm-overlay.dts +++ b/qcom/ravelin-idp-wcn3950-amoled-rcm-overlay.dts @@ -11,6 +11,6 @@ / { model = "Qualcomm Technologies, Inc. Ravelin WCN3950 IDP + AMOLED + RCM"; compatible = "qcom,ravelin-idp", "qcom,ravelin", "qcom,idp"; - qcom,msm-id = <568 0x10000>, <602 0x10000>; + qcom,msm-id = <568 0x10000>, <602 0x10000>, <653 0x10000>, <654 0x10000>; qcom,board-id = <34 2>; }; diff --git a/qcom/ravelin-idp-wcn3988-4gb-overlay.dts b/qcom/ravelin-idp-wcn3988-4gb-overlay.dts index cc8bf2e9..8402b692 100644 --- a/qcom/ravelin-idp-wcn3988-4gb-overlay.dts +++ b/qcom/ravelin-idp-wcn3988-4gb-overlay.dts @@ -11,6 +11,6 @@ / { model = "Qualcomm Technologies, Inc. Ravelin IDP 4GB DDR + WCN3988"; compatible = "qcom,ravelin-idp", "qcom,ravelin", "qcom,idp"; - qcom,msm-id = <568 0x10000>, <602 0x10000>; + qcom,msm-id = <568 0x10000>, <602 0x10000>, <653 0x10000>, <654 0x10000>; qcom,board-id = <34 0x601>; }; diff --git a/qcom/ravelin-qrd-4gb-overlay.dts b/qcom/ravelin-qrd-4gb-overlay.dts index ea38d8c4..0909b4cc 100644 --- a/qcom/ravelin-qrd-4gb-overlay.dts +++ b/qcom/ravelin-qrd-4gb-overlay.dts @@ -11,6 +11,6 @@ / { model = "Qualcomm Technologies, Inc. Ravelin QRD 4GB DDR"; compatible = "qcom,ravelin-qrd", "qcom,ravelin", "qcom,qrd"; - qcom,msm-id = <568 0x10000>, <602 0x10000>; + qcom,msm-id = <568 0x10000>, <602 0x10000>, <653 0x10000>, <654 0x10000>; qcom,board-id = <0x1000B 0x600>; }; diff --git a/qcom/ravelin-qrd-overlay.dts b/qcom/ravelin-qrd-overlay.dts index 5de8fb12..762a33d2 100644 --- a/qcom/ravelin-qrd-overlay.dts +++ b/qcom/ravelin-qrd-overlay.dts @@ -11,7 +11,8 @@ / { model = "Qualcomm Technologies, Inc. Ravelin QRD"; compatible = "qcom,ravelin-qrd", "qcom,ravelin", "qcom,qrd"; - qcom,msm-id = <568 0x10000>, <602 0x10000>, <581 0x10000>, <582 0x10000>; + qcom,msm-id = <568 0x10000>, <602 0x10000>, <581 0x10000>, <582 0x10000>, + <653 0x10000>, <654 0x10000>; qcom,board-id = <0x1000B 0>; }; diff --git a/qcom/ravelin-sg-atp.dts b/qcom/ravelin-sg-atp.dts new file mode 100644 index 00000000..95dec91a --- /dev/null +++ b/qcom/ravelin-sg-atp.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "ravelin-sg.dtsi" +#include "ravelin-sg-atp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Ravelin SG ATP"; + compatible = "qcom,ravelin-atp", "qcom,ravelin", "qcom,atp"; + qcom,board-id = <33 0>; +}; + diff --git a/qcom/ravelin-sg-atp.dtsi b/qcom/ravelin-sg-atp.dtsi new file mode 100644 index 00000000..1a4b89e5 --- /dev/null +++ b/qcom/ravelin-sg-atp.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "ravelin-atp.dtsi" diff --git a/qcom/ravelin-sg-idp-wcn3950-amoled-rcm.dts b/qcom/ravelin-sg-idp-wcn3950-amoled-rcm.dts new file mode 100644 index 00000000..4026ad8d --- /dev/null +++ b/qcom/ravelin-sg-idp-wcn3950-amoled-rcm.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "ravelin-sg.dtsi" +#include "ravelin-sg-idp-wcn3950-amoled-rcm.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Ravelin SG WCN3950 IDP + AMOLED + RCM"; + compatible = "qcom,ravelin-idp", "qcom,ravelin", "qcom,idp"; + qcom,board-id = <34 2>; +}; diff --git a/qcom/ravelin-sg-idp-wcn3950-amoled-rcm.dtsi b/qcom/ravelin-sg-idp-wcn3950-amoled-rcm.dtsi new file mode 100644 index 00000000..787f9e04 --- /dev/null +++ b/qcom/ravelin-sg-idp-wcn3950-amoled-rcm.dtsi @@ -0,0 +1,7 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "ravelin-idp-wcn3950-amoled-rcm.dtsi" + diff --git a/qcom/ravelin-sg-idp-wcn3988-4gb.dts b/qcom/ravelin-sg-idp-wcn3988-4gb.dts new file mode 100644 index 00000000..362958cc --- /dev/null +++ b/qcom/ravelin-sg-idp-wcn3988-4gb.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "ravelin-4gb.dtsi" +#include "ravelin-sg-idp-wcn3988-4gb.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Ravelin SG IDP 4GB DDR + WCN3988"; + compatible = "qcom,ravelin-idp", "qcom,ravelin", "qcom,idp"; + qcom,board-id = <34 0x601>; +}; diff --git a/qcom/ravelin-sg-idp-wcn3988-4gb.dtsi b/qcom/ravelin-sg-idp-wcn3988-4gb.dtsi new file mode 100644 index 00000000..b3eb3adb --- /dev/null +++ b/qcom/ravelin-sg-idp-wcn3988-4gb.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "ravelin-idp-wcn3988-4gb.dtsi" diff --git a/qcom/ravelin-sg-idp.dts b/qcom/ravelin-sg-idp.dts new file mode 100644 index 00000000..381cdcca --- /dev/null +++ b/qcom/ravelin-sg-idp.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "ravelin-sg.dtsi" +#include "ravelin-sg-idp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Ravelin SG IDP"; + compatible = "qcom,ravelin-idp", "qcom,ravelin", "qcom,idp"; + qcom,board-id = <34 0>; +}; + diff --git a/qcom/ravelin-sg-idp.dtsi b/qcom/ravelin-sg-idp.dtsi new file mode 100644 index 00000000..122b06c7 --- /dev/null +++ b/qcom/ravelin-sg-idp.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "ravelin-idp.dtsi" diff --git a/qcom/ravelin-sg-qrd-4gb.dts b/qcom/ravelin-sg-qrd-4gb.dts new file mode 100644 index 00000000..ce83076c --- /dev/null +++ b/qcom/ravelin-sg-qrd-4gb.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "ravelin-4gb.dtsi" +#include "ravelin-sg-qrd-4gb.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Ravelin SG QRD 4GB DDR"; + compatible = "qcom,ravelin-qrd", "qcom,ravelin", "qcom,qrd"; + qcom,board-id = <0x1000B 0x600>; +}; + diff --git a/qcom/ravelin-sg-qrd-4gb.dtsi b/qcom/ravelin-sg-qrd-4gb.dtsi new file mode 100644 index 00000000..4b5b6f61 --- /dev/null +++ b/qcom/ravelin-sg-qrd-4gb.dtsi @@ -0,0 +1,7 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "ravelin-qrd-4gb.dtsi" + diff --git a/qcom/ravelin-sg-qrd.dts b/qcom/ravelin-sg-qrd.dts new file mode 100644 index 00000000..d52cdc6c --- /dev/null +++ b/qcom/ravelin-sg-qrd.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "ravelin-sg.dtsi" +#include "ravelin-sg-qrd.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Ravelin SG QRD"; + compatible = "qcom,ravelin-qrd", "qcom,ravelin", "qcom,qrd"; + qcom,board-id = <0x1000B 0>; +}; + + diff --git a/qcom/ravelin-sg-qrd.dtsi b/qcom/ravelin-sg-qrd.dtsi new file mode 100644 index 00000000..c0e0c1bc --- /dev/null +++ b/qcom/ravelin-sg-qrd.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "ravelin-qrd.dtsi" diff --git a/qcom/ravelin-sg.dts b/qcom/ravelin-sg.dts new file mode 100644 index 00000000..a851c7a8 --- /dev/null +++ b/qcom/ravelin-sg.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "ravelin-sg.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. Ravelin SG SoC"; + compatible = "qcom,ravelin"; + qcom,board-id = <0 0>; +}; + diff --git a/qcom/ravelin-sg.dtsi b/qcom/ravelin-sg.dtsi new file mode 100644 index 00000000..0981fc84 --- /dev/null +++ b/qcom/ravelin-sg.dtsi @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "ravelin.dtsi" + +/ { + + model = "Qualcomm Technologies, Inc. Ravelin SG"; + compatible = "qcom,ravelin"; + qcom,msm-id = <653 0x10000>; +}; diff --git a/qcom/ravelinp-sg-atp.dts b/qcom/ravelinp-sg-atp.dts new file mode 100644 index 00000000..0b8a551f --- /dev/null +++ b/qcom/ravelinp-sg-atp.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "ravelinp-sg.dtsi" +#include "ravelinp-sg-atp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. RavelinP SG ATP"; + compatible = "qcom,ravelinp-atp", "qcom,ravelinp", "qcom,atp"; + qcom,board-id = <33 0>; +}; + diff --git a/qcom/ravelinp-sg-atp.dtsi b/qcom/ravelinp-sg-atp.dtsi new file mode 100644 index 00000000..ebb9b984 --- /dev/null +++ b/qcom/ravelinp-sg-atp.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "ravelin-sg-atp.dtsi" diff --git a/qcom/ravelinp-sg-idp-wcn3950-amoled-rcm.dts b/qcom/ravelinp-sg-idp-wcn3950-amoled-rcm.dts new file mode 100644 index 00000000..8c27ce5f --- /dev/null +++ b/qcom/ravelinp-sg-idp-wcn3950-amoled-rcm.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "ravelinp-sg.dtsi" +#include "ravelinp-sg-idp-wcn3950-amoled-rcm.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. RavelinP SG WCN3950 IDP + AMOLED + RCM"; + compatible = "qcom,ravelinp-idp", "qcom,ravelinp", "qcom,idp"; + qcom,board-id = <34 2>; +}; diff --git a/qcom/ravelinp-sg-idp-wcn3950-amoled-rcm.dtsi b/qcom/ravelinp-sg-idp-wcn3950-amoled-rcm.dtsi new file mode 100644 index 00000000..dbc926c2 --- /dev/null +++ b/qcom/ravelinp-sg-idp-wcn3950-amoled-rcm.dtsi @@ -0,0 +1,7 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "ravelin-sg-idp-wcn3950-amoled-rcm.dtsi" + diff --git a/qcom/ravelinp-sg-idp-wcn3988-4gb.dts b/qcom/ravelinp-sg-idp-wcn3988-4gb.dts new file mode 100644 index 00000000..26e344ca --- /dev/null +++ b/qcom/ravelinp-sg-idp-wcn3988-4gb.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "ravelinp-4gb.dtsi" +#include "ravelinp-sg-idp-wcn3988-4gb.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. RavelinP SG IDP 4GB DDR + WCN3988"; + compatible = "qcom,ravelinp-idp", "qcom,ravelinp", "qcom,idp"; + qcom,board-id = <34 0x601>; +}; diff --git a/qcom/ravelinp-sg-idp-wcn3988-4gb.dtsi b/qcom/ravelinp-sg-idp-wcn3988-4gb.dtsi new file mode 100644 index 00000000..c4d7b514 --- /dev/null +++ b/qcom/ravelinp-sg-idp-wcn3988-4gb.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "ravelin-sg-idp-wcn3988-4gb.dtsi" diff --git a/qcom/ravelinp-sg-idp.dts b/qcom/ravelinp-sg-idp.dts new file mode 100644 index 00000000..33902723 --- /dev/null +++ b/qcom/ravelinp-sg-idp.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "ravelinp-sg.dtsi" +#include "ravelinp-sg-idp.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. RavelinP SG IDP"; + compatible = "qcom,ravelinp-idp", "qcom,ravelinp", "qcom,idp"; + qcom,board-id = <34 0>; +}; + diff --git a/qcom/ravelinp-sg-idp.dtsi b/qcom/ravelinp-sg-idp.dtsi new file mode 100644 index 00000000..d1626b92 --- /dev/null +++ b/qcom/ravelinp-sg-idp.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "ravelin-sg-idp.dtsi" diff --git a/qcom/ravelinp-sg-qrd-4gb.dts b/qcom/ravelinp-sg-qrd-4gb.dts new file mode 100644 index 00000000..02ed7743 --- /dev/null +++ b/qcom/ravelinp-sg-qrd-4gb.dts @@ -0,0 +1,16 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "ravelinp-4gb.dtsi" +#include "ravelinp-sg-qrd-4gb.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. RavelinP SG QRD 4GB DDR"; + compatible = "qcom,ravelinp-qrd", "qcom,ravelinp", "qcom,qrd"; + qcom,board-id = <0x1000B 0x600>; +}; + diff --git a/qcom/ravelinp-sg-qrd-4gb.dtsi b/qcom/ravelinp-sg-qrd-4gb.dtsi new file mode 100644 index 00000000..0245ec57 --- /dev/null +++ b/qcom/ravelinp-sg-qrd-4gb.dtsi @@ -0,0 +1,7 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "ravelin-sg-qrd-4gb.dtsi" + diff --git a/qcom/ravelinp-sg-qrd.dts b/qcom/ravelinp-sg-qrd.dts new file mode 100644 index 00000000..fb97f8b3 --- /dev/null +++ b/qcom/ravelinp-sg-qrd.dts @@ -0,0 +1,17 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "ravelinp-sg.dtsi" +#include "ravelinp-sg-qrd.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. RavelinP SG QRD"; + compatible = "qcom,ravelinp-qrd", "qcom,ravelinp", "qcom,qrd"; + qcom,board-id = <0x1000B 0>; +}; + + diff --git a/qcom/ravelinp-sg-qrd.dtsi b/qcom/ravelinp-sg-qrd.dtsi new file mode 100644 index 00000000..e7fa0492 --- /dev/null +++ b/qcom/ravelinp-sg-qrd.dtsi @@ -0,0 +1,6 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "ravelin-sg-qrd.dtsi" diff --git a/qcom/ravelinp-sg.dts b/qcom/ravelinp-sg.dts new file mode 100644 index 00000000..3ee5eceb --- /dev/null +++ b/qcom/ravelinp-sg.dts @@ -0,0 +1,15 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "ravelinp-sg.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. RavelinP SG SoC"; + compatible = "qcom,ravelinp"; + qcom,board-id = <0 0>; +}; + diff --git a/qcom/ravelinp-sg.dtsi b/qcom/ravelinp-sg.dtsi new file mode 100644 index 00000000..66a40c4c --- /dev/null +++ b/qcom/ravelinp-sg.dtsi @@ -0,0 +1,13 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +#include "ravelin-sg.dtsi" + +/ { + + model = "Qualcomm Technologies, Inc. RavelinP SG"; + compatible = "qcom,ravelinp"; + qcom,msm-id = <654 0x10000>; +};