diff --git a/qcom/pmk8550.dtsi b/qcom/pmk8550.dtsi
index d02ab00f..866dc1ea 100644
--- a/qcom/pmk8550.dtsi
+++ b/qcom/pmk8550.dtsi
@@ -1,6 +1,6 @@
 // SPDX-License-Identifier: BSD-3-Clause
 /*
- * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved.
+ * Copyright (c) 2022-2024 Qualcomm Innovation Center, Inc. All rights reserved.
  */
 
 #include <dt-bindings/input/input.h>
@@ -46,6 +46,10 @@
 				bits = <1 7>;
 			};
 
+			wr_thermal_flag: wr_thermal-flag@58 {
+				reg = <0x58 0x1>;
+			};
+
 			alarm_log: alarm-log@76 {
 				reg = <0x76 0x6>;
 			};
diff --git a/qcom/sun-thermal-overlay.dtsi b/qcom/sun-thermal-overlay.dtsi
index 3f0563e3..ea61051c 100644
--- a/qcom/sun-thermal-overlay.dtsi
+++ b/qcom/sun-thermal-overlay.dtsi
@@ -5,6 +5,15 @@
 
 #include <dt-bindings/thermal/thermal_qti.h>
 
+&soc {
+	gpu_dump_skip_cdev: qcom,gpu-dump-skip-cdev {
+		compatible = "qcom,gpu-dump-skip-cdev";
+		nvmem-cells = <&wr_thermal_flag>;
+		nvmem-cell-names = "wr_thermal_flag";
+		#cooling-cells = <2>;
+	};
+};
+
 &thermal_zones {
 	socd {
 		cooling-maps {
@@ -249,4 +258,21 @@
 			};
 		};
 	};
+
+	sys-therm-2 {
+		trips {
+			sys_therm2_config0: sys-therm2-config0 {
+				temperature = <60000>;
+				hysteresis = <10000>;
+				type = "passive";
+			};
+		};
+
+		cooling-maps {
+			gpu_dump_skip {
+				trip = <&sys_therm2_config0>;
+				cooling-device = <&gpu_dump_skip_cdev 1 1>;
+			};
+		};
+	};
 };
diff --git a/qcom/sun.dtsi b/qcom/sun.dtsi
index e3a0e39a..3fabd19e 100644
--- a/qcom/sun.dtsi
+++ b/qcom/sun.dtsi
@@ -1410,6 +1410,11 @@
 			compatible = "qcom,msm-imem-mss-dsm";
 			reg = <0xc98 0x10>;
 		};
+
+		sys_dbg@af8 {
+			compatible = "qcom,msm-imem-gpu-dump-skip";
+			reg = <0xb0c 0x4>;
+		};
 	};
 
 	cluster-device0 {