ARM: dts: msm: enable QoS programming for KERA
Enable QoS programming for kera and add necessary AXI and AHB clock handles for programming QoS for USB, IPA and PCIE masters. Change-Id: I51bcc6a841005b6daf8ab3f22a79e6704dc3b3ed Signed-off-by: Swetha Chintavatla <quic_chintava@quicinc.com>
This commit is contained in:
committed by
Raviteja Laggyshetty
parent
153577d637
commit
ddb6fa1714
@@ -1901,7 +1901,6 @@
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#interconnect-cells = <1>;
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#interconnect-cells = <1>;
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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qcom,bcm-voters = <&apps_bcm_voter>;
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qcom,skip-qos;
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};
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};
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cnoc_main: interconnect@1500000 {
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cnoc_main: interconnect@1500000 {
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@@ -1910,7 +1909,6 @@
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#interconnect-cells = <1>;
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#interconnect-cells = <1>;
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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qcom,bcm-voters = <&apps_bcm_voter>;
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qcom,skip-qos;
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};
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};
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system_noc: interconnect@1680000 {
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system_noc: interconnect@1680000 {
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@@ -1919,7 +1917,6 @@
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#interconnect-cells = <1>;
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#interconnect-cells = <1>;
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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qcom,bcm-voters = <&apps_bcm_voter>;
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qcom,skip-qos;
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};
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};
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pcie_noc: interconnect@16c0000 {
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pcie_noc: interconnect@16c0000 {
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@@ -1928,7 +1925,8 @@
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#interconnect-cells = <1>;
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#interconnect-cells = <1>;
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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qcom,bcm-voters = <&apps_bcm_voter>;
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qcom,skip-qos;
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clocks = <&gcc GCC_AGGRE_NOC_PCIE_AXI_CLK>,
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<&gcc GCC_CFG_NOC_PCIE_ANOC_AHB_CLK>;
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};
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};
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aggre1_noc: interconnect@16e0000 {
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aggre1_noc: interconnect@16e0000 {
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@@ -1937,7 +1935,7 @@
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#interconnect-cells = <1>;
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#interconnect-cells = <1>;
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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qcom,bcm-voters = <&apps_bcm_voter>;
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qcom,skip-qos;
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clocks = <&gcc GCC_AGGRE_USB3_PRIM_AXI_CLK>;
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};
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};
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aggre2_noc: interconnect@1700000 {
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aggre2_noc: interconnect@1700000 {
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@@ -1946,7 +1944,7 @@
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#interconnect-cells = <1>;
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#interconnect-cells = <1>;
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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qcom,bcm-voters = <&apps_bcm_voter>;
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qcom,skip-qos;
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clocks = <&rpmhcc RPMH_IPA_CLK>;
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};
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};
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mmss_noc: interconnect@1780000 {
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mmss_noc: interconnect@1780000 {
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@@ -1955,7 +1953,6 @@
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#interconnect-cells = <1>;
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#interconnect-cells = <1>;
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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qcom,bcm-voters = <&apps_bcm_voter>;
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qcom,skip-qos;
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};
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};
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gem_noc: interconnect@24100000 {
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gem_noc: interconnect@24100000 {
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@@ -1964,7 +1961,6 @@
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#interconnect-cells = <1>;
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#interconnect-cells = <1>;
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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qcom,bcm-voters = <&apps_bcm_voter>;
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qcom,skip-qos;
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};
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};
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nsp_noc: interconnect@320c0000 {
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nsp_noc: interconnect@320c0000 {
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@@ -1973,7 +1969,6 @@
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#interconnect-cells = <1>;
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#interconnect-cells = <1>;
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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qcom,bcm-voters = <&apps_bcm_voter>;
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qcom,skip-qos;
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};
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};
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lpass_ag_noc: interconnect@7e40000 {
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lpass_ag_noc: interconnect@7e40000 {
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@@ -1982,7 +1977,6 @@
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#interconnect-cells = <1>;
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#interconnect-cells = <1>;
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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qcom,bcm-voters = <&apps_bcm_voter>;
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qcom,skip-qos;
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};
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};
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lpass_lpiaon_noc: interconnect@7400000 {
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lpass_lpiaon_noc: interconnect@7400000 {
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@@ -1991,7 +1985,6 @@
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#interconnect-cells = <1>;
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#interconnect-cells = <1>;
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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qcom,bcm-voters = <&apps_bcm_voter>;
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qcom,skip-qos;
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};
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};
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lpass_lpicx_noc: interconnect@7420000 {
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lpass_lpicx_noc: interconnect@7420000 {
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@@ -2000,7 +1993,6 @@
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#interconnect-cells = <1>;
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#interconnect-cells = <1>;
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voter-names = "hlos";
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qcom,bcm-voters = <&apps_bcm_voter>;
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qcom,bcm-voters = <&apps_bcm_voter>;
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qcom,skip-qos;
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};
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};
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trust_ui_vm_vblk0_ring: trust_ui_vm_vblk0_ring {
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trust_ui_vm_vblk0_ring: trust_ui_vm_vblk0_ring {
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