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ARM: dts: qcom: Add crmb/crmc to cesta device for pineapple

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Add crmb and crmc register space for cesta devices on pineapple.

Change-Id: Ia8ec195ca1683e652b31a5daa2ab271e8bcec321
Signed-off-by: Gokul krishna Krishnakumar <quic_gokukris@quicinc.com>
This commit is contained in:
Gokul krishna Krishnakumar
2023-05-02 00:26:18 -07:00
parent 2bc566de0e
commit db32d03865
1 changed files with 4 additions and 4 deletions
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8
qcom/pineapple.dtsi
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@@ -872,8 +872,8 @@
cam_crm: crm@add7000 { cam_crm: crm@add7000 {
label = "cam_crm"; label = "cam_crm";
compatible = "qcom,cam-crm"; compatible = "qcom,cam-crm";
reg = <0xadd7000 0x2000>; reg = <0xadd7000 0x2000>, <0xadd9800 0x800>, <0xadda000 0x2000>;
reg-names = "base"; reg-names = "base", "crm_b", "crm_c";
interrupts = <GIC_SPI 121 IRQ_TYPE_EDGE_RISING>; interrupts = <GIC_SPI 121 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "cam_crm"; interrupt-names = "cam_crm";
clocks = <&camcc CAM_CC_DRV_AHB_CLK>; clocks = <&camcc CAM_CC_DRV_AHB_CLK>;
@@ -884,8 +884,8 @@
pcie_crm: crm@1d01000 { pcie_crm: crm@1d01000 {
label = "pcie_crm"; label = "pcie_crm";
compatible = "qcom,pcie-crm"; compatible = "qcom,pcie-crm";
reg = <0x1d01000 0x3000>; reg = <0x1d01000 0x3000>, <0x1d04800 0x800>, <0x1d05000 0x2000>;
reg-names = "base"; reg-names = "base", "crm_b", "crm_c";
interrupts = <GIC_SPI 248 IRQ_TYPE_EDGE_RISING>; interrupts = <GIC_SPI 248 IRQ_TYPE_EDGE_RISING>;
interrupt-names = "pcie_crm"; interrupt-names = "pcie_crm";
clocks = <&pcie_0_pipe_clk>; clocks = <&pcie_0_pipe_clk>;