samsung_sm8750/android_kernel_samsung_sm8750-devicetrees
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Merge "ARM: dts: msm: Add psci node and change enable method on sun"

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This commit is contained in:
qctecmdr
2023-06-30 20:09:35 -07:00
committed by Gerrit - the friendly Code Review server
parent a6bb486ea9 9f2ed04bf3
commit db0f58347d
3 changed files with 19 additions and 20 deletions
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3
qcom/sun-rumi-overlay.dts
View File

@@ -4,9 +4,8 @@
*/ */
/dts-v1/; /dts-v1/;
/memreserve/ 0x90000000 0x100000; /plugin/;
#include "sun.dtsi"
#include "sun-rumi.dtsi" #include "sun-rumi.dtsi"
/ { / {

4
qcom/sun-rumi.dtsi
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@@ -11,11 +11,11 @@
}; };
&arch_timer { &arch_timer {
clock-frequency = <192000>; clock-frequency = <500000>;
}; };
&memtimer { &memtimer {
clock-frequency = <192000>; clock-frequency = <500000>;
}; };
&qupv3_se7_2uart { &qupv3_se7_2uart {

32
qcom/sun.dtsi
View File

@@ -45,8 +45,7 @@
device_type = "cpu"; device_type = "cpu";
compatible = "arm,armv8"; compatible = "arm,armv8";
reg = <0x0 0x0>; reg = <0x0 0x0>;
enable-method = "spin-table"; enable-method = "psci";
cpu-release-addr = <0x0 0x90000000>;
next-level-cache = <&L2_0>; next-level-cache = <&L2_0>;
L2_0: l2-cache { L2_0: l2-cache {
compatible = "arm,arch-cache"; compatible = "arm,arch-cache";
@@ -58,8 +57,7 @@
device_type = "cpu"; device_type = "cpu";
compatible = "arm,armv8"; compatible = "arm,armv8";
reg = <0x0 0x100>; reg = <0x0 0x100>;
enable-method = "spin-table"; enable-method = "psci";
cpu-release-addr = <0x0 0x90000000>;
next-level-cache = <&L2_0>; next-level-cache = <&L2_0>;
}; };
@@ -67,8 +65,7 @@
device_type = "cpu"; device_type = "cpu";
compatible = "arm,armv8"; compatible = "arm,armv8";
reg = <0x0 0x200>; reg = <0x0 0x200>;
enable-method = "spin-table"; enable-method = "psci";
cpu-release-addr = <0x0 0x90000000>;
next-level-cache = <&L2_0>; next-level-cache = <&L2_0>;
}; };
@@ -76,8 +73,7 @@
device_type = "cpu"; device_type = "cpu";
compatible = "arm,armv8"; compatible = "arm,armv8";
reg = <0x0 0x300>; reg = <0x0 0x300>;
enable-method = "spin-table"; enable-method = "psci";
cpu-release-addr = <0x0 0x90000000>;
next-level-cache = <&L2_0>; next-level-cache = <&L2_0>;
}; };
@@ -85,8 +81,7 @@
device_type = "cpu"; device_type = "cpu";
compatible = "arm,armv8"; compatible = "arm,armv8";
reg = <0x0 0x400>; reg = <0x0 0x400>;
enable-method = "spin-table"; enable-method = "psci";
cpu-release-addr = <0x0 0x90000000>;
next-level-cache = <&L2_0>; next-level-cache = <&L2_0>;
}; };
@@ -94,8 +89,7 @@
device_type = "cpu"; device_type = "cpu";
compatible = "arm,armv8"; compatible = "arm,armv8";
reg = <0x0 0x500>; reg = <0x0 0x500>;
enable-method = "spin-table"; enable-method = "psci";
cpu-release-addr = <0x0 0x90000000>;
next-level-cache = <&L2_0>; next-level-cache = <&L2_0>;
}; };
@@ -103,8 +97,7 @@
device_type = "cpu"; device_type = "cpu";
compatible = "arm,armv8"; compatible = "arm,armv8";
reg = <0x0 0x10000>; reg = <0x0 0x10000>;
enable-method = "spin-table"; enable-method = "psci";
cpu-release-addr = <0x0 0x90000000>;
next-level-cache = <&L2_6>; next-level-cache = <&L2_6>;
L2_6: l2-cache { L2_6: l2-cache {
compatible = "arm,arch-cache"; compatible = "arm,arch-cache";
@@ -116,8 +109,7 @@
device_type = "cpu"; device_type = "cpu";
compatible = "arm,armv8"; compatible = "arm,armv8";
reg = <0x0 0x10100>; reg = <0x0 0x10100>;
enable-method = "spin-table"; enable-method = "psci";
cpu-release-addr = <0x0 0x90000000>;
next-level-cache = <&L2_6>; next-level-cache = <&L2_6>;
}; };
@@ -284,6 +276,9 @@
clock-frequency = <19200000>; clock-frequency = <19200000>;
}; };
qcom_tzlog: tz-log@0 {
};
clk_virt: interconnect@0 { clk_virt: interconnect@0 {
compatible = "qcom,sun-clk_virt"; compatible = "qcom,sun-clk_virt";
qcom,stub; qcom,stub;
@@ -734,6 +729,11 @@
compatible = "qcom,stub-regulator"; compatible = "qcom,stub-regulator";
regulator-name = "video_cc_mvs0c_gdsc"; regulator-name = "video_cc_mvs0c_gdsc";
}; };
psci {
compatible = "arm,psci-1.0";
method = "smc";
};
}; };
&reserved_memory { &reserved_memory {