ARM: dts: msm: add HDK variant DT support on sun target
Add HDK variant DT support on sun target. Change-Id: I18be1e19013713ed0984e087d5f28638ab5c438c Signed-off-by: Lei Chen <quic_chenlei@quicinc.com>
This commit is contained in:
Lei Chen
3
Kbuild
3
Kbuild
@@ -21,7 +21,8 @@ dtbo-$(CONFIG_ARCH_SUN) += display/sun-sde.dtbo \
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display/sun-sde-display-rcm-kiwi-v8-overlay.dtbo \
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display/sun-sde-display-rcm-v8-overlay.dtbo \
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display/sun-sde-display-mtp-qmp1000-overlay.dtbo \
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display/sun-sde-display-mtp-qmp1000-v8-overlay.dtbo
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display/sun-sde-display-mtp-qmp1000-v8-overlay.dtbo \
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display/sun-sde-display-hdk-overlay.dtbo
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else
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dtbo-$(CONFIG_ARCH_SUN) += display/trustedvm-sun-sde-display-cdp-overlay.dtbo \
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display/trustedvm-sun-sde-display-mtp-overlay.dtbo \
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51
display/dsi-panel-ext-bridge-1080p.dtsi
Normal file
51
display/dsi-panel-ext-bridge-1080p.dtsi
Normal file
@@ -0,0 +1,51 @@
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// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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&mdss_mdp {
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dsi_ext_bridge_1080p: qcom,mdss_dsi_ext_bridge_1080p {
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qcom,mdss-dsi-panel-name = "ext video mode dsi bridge";
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qcom,mdss-dsi-panel-type = "dsi_video_mode";
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qcom,dsi-ctrl-num = <0>;
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qcom,dsi-phy-num = <0>;
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qcom,dsi-select-clocks = "src_byte_clk0", "src_pixel_clk0";
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qcom,mdss-dsi-virtual-channel-id = <0>;
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qcom,mdss-dsi-stream = <0>;
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qcom,mdss-dsi-bpp = <24>;
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qcom,mdss-dsi-border-color = <0>;
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qcom,mdss-dsi-traffic-mode = "non_burst_sync_pulse";
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qcom,mdss-dsi-bllp-eof-power-mode;
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qcom,mdss-dsi-bllp-power-mode;
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qcom,mdss-dsi-lane-0-state;
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qcom,mdss-dsi-lane-1-state;
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qcom,mdss-dsi-lane-2-state;
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qcom,mdss-dsi-lane-3-state;
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qcom,mdss-dsi-dma-trigger = "trigger_sw";
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qcom,mdss-dsi-mdp-trigger = "none";
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qcom,mdss-dsi-t-clk-post = <0x03>;
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qcom,mdss-dsi-t-clk-pre = <0x24>;
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qcom,mdss-dsi-force-clock-lane-hs;
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qcom,mdss-dsi-ext-bridge-mode;
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qcom,mdss-dsi-display-timings {
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timing@0 {
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qcom,mdss-dsi-panel-width = <1920>;
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qcom,mdss-dsi-panel-height = <1080>;
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qcom,mdss-dsi-h-front-porch = <88>;
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qcom,mdss-dsi-h-back-porch = <148>;
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qcom,mdss-dsi-h-pulse-width = <44>;
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qcom,mdss-dsi-h-sync-skew = <0>;
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qcom,mdss-dsi-v-back-porch = <36>;
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qcom,mdss-dsi-v-front-porch = <4>;
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qcom,mdss-dsi-v-pulse-width = <5>;
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qcom,mdss-dsi-h-sync-pulse = <0>;
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qcom,mdss-dsi-panel-framerate = <60>;
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qcom,display-topology = <1 0 1>;
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qcom,default-topology-index = <0>;
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};
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};
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};
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};
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@@ -31,6 +31,7 @@
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#include "dsi-panel-vtdr6130-dsc-fhd-plus-video.dtsi"
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#include "dsi-panel-vtdr6130-qsync-dsc-fhd-plus-144hz-cmd.dtsi"
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#include "dsi-panel-vtdr6130-qsync-dsc-fhd-plus-144hz-video.dtsi"
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#include "dsi-panel-ext-bridge-1080p.dtsi"
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#include "sun-sde-display-pinctrl.dtsi"
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@@ -643,6 +644,17 @@
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};
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};
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&dsi_ext_bridge_1080p {
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qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
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qcom,mdss-dsi-display-timings {
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timing@0 {
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qcom,mdss-dsi-panel-phy-timings = [00 1e 08 07 18 22 08
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08 08 02 04 1a 0c 00];
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qcom,display-topology = <1 0 1>;
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};
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};
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};
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&dsi_sharp_4k_dsc_cmd {
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qcom,dsi-select-clocks = "pll_byte_clk0", "pll_dsi_clk0";
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16
display/sun-sde-display-hdk-overlay.dts
Normal file
16
display/sun-sde-display-hdk-overlay.dts
Normal file
@@ -0,0 +1,16 @@
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// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2024 Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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/dts-v1/;
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/plugin/;
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#include "sun-sde-display-hdk.dtsi"
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/ {
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model = "Qualcomm Technologies, Inc. SunP QRD HDK";
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compatible = "qcom,sunp-hdk", "qcom,sunp", "qcom,hdk";
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qcom,msm-id = <639 0x10000>, <639 0x20000>, <618 0x10000>, <618 0x20000>;
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qcom,board-id = <0x1001f 0>;
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};
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281
display/sun-sde-display-hdk.dtsi
Normal file
281
display/sun-sde-display-hdk.dtsi
Normal file
@@ -0,0 +1,281 @@
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// SPDX-License-Identifier: BSD-3-Clause
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/*
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* Copyright (c) 2024, Qualcomm Innovation Center, Inc. All rights reserved.
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*/
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#include "sun-sde-display.dtsi"
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&dsi_vtdr6130_amoled_cmd {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
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qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-bl-min-level = <10>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,mdss-brightness-max-level = <8191>;
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qcom,mdss-dsi-bl-inverted-dbv;
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qcom,platform-reset-gpio = <&tlmm 98 0>;
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qcom,platform-sec-reset-gpio = <&tlmm 97 0>;
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};
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&dsi_vtdr6130_amoled_video {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
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qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-bl-min-level = <10>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,mdss-brightness-max-level = <8191>;
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qcom,mdss-dsi-bl-inverted-dbv;
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qcom,platform-reset-gpio = <&tlmm 98 0>;
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qcom,platform-sec-reset-gpio = <&tlmm 97 0>;
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};
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&dsi_vtdr6130_amoled_120hz_cmd {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-bl-min-level = <10>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,mdss-brightness-max-level = <8191>;
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qcom,mdss-dsi-bl-inverted-dbv;
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qcom,platform-reset-gpio = <&tlmm 98 0>;
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};
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&dsi_nt37801_amoled_cmd {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-bl-min-level = <10>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,mdss-brightness-max-level = <8191>;
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qcom,mdss-dsi-bl-inverted-dbv;
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qcom,platform-reset-gpio = <&tlmm 98 0>;
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};
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&dsi_nt37801_amoled_cmd_cphy {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-bl-min-level = <10>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,mdss-brightness-max-level = <8191>;
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qcom,mdss-dsi-bl-inverted-dbv;
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qcom,platform-reset-gpio = <&tlmm 98 0>;
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};
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&dsi_nt37801_amoled_video {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-bl-min-level = <10>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,mdss-brightness-max-level = <8191>;
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qcom,mdss-dsi-bl-inverted-dbv;
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qcom,platform-reset-gpio = <&tlmm 98 0>;
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};
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&dsi_nt37801_amoled_video_cphy {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-bl-min-level = <10>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,mdss-brightness-max-level = <8191>;
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qcom,mdss-dsi-bl-inverted-dbv;
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qcom,platform-reset-gpio = <&tlmm 98 0>;
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};
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&dsi_vtdr6130_amoled_120hz_video {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-bl-min-level = <10>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,mdss-brightness-max-level = <8191>;
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qcom,mdss-dsi-bl-inverted-dbv;
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qcom,platform-reset-gpio = <&tlmm 98 0>;
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};
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&dsi_sim_panel_au {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-bl-min-level = <10>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,mdss-brightness-max-level = <8191>;
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qcom,mdss-dsi-bl-inverted-dbv;
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qcom,platform-reset-gpio = <&tlmm 98 0>;
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};
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&dsi_vtdr6130_amoled_qsync_144hz_cmd {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-bl-min-level = <10>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,mdss-brightness-max-level = <8191>;
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qcom,mdss-dsi-bl-inverted-dbv;
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qcom,platform-reset-gpio = <&tlmm 98 0>;
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};
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&dsi_vtdr6130_amoled_qsync_144hz_video {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-bl-min-level = <10>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,mdss-brightness-max-level = <8191>;
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qcom,mdss-dsi-bl-inverted-dbv;
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qcom,platform-reset-gpio = <&tlmm 98 0>;
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};
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&dsi_sharp_4k_dsc_cmd {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply_avdd>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external";
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qcom,mdss-dsi-bl-min-level = <1>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,platform-reset-gpio = <&tlmm 98 0>;
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qcom,platform-bklight-en-gpio = <&tlmm 100 0>;
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};
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&dsi_sharp_4k_dsc_video {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply_avdd>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_external";
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qcom,mdss-dsi-bl-min-level = <1>;
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qcom,mdss-dsi-bl-max-level = <4095>;
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qcom,platform-reset-gpio = <&tlmm 98 0>;
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qcom,platform-bklight-en-gpio = <&tlmm 100 0>;
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};
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&dsi_sim_cmd {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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};
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&dsi_sim_vid {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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};
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&dsi_sim_dsc_375_cmd {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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};
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&dsi_sim_dsc_10b_cmd {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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};
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&dsi_dual_sim_cmd {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,bl-dsc-cmd-state = "dsi_lp_mode";
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};
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&dsi_dual_sim_dsc_375_cmd {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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};
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&dsi_sim_sec_hd_cmd {
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qcom,panel-supply-entries = <&dsi_panel_pwr_supply_sim>;
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qcom,panel-sec-supply-entries = <&dsi_panel_pwr_supply_sim>;
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qcom,mdss-dsi-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-sec-bl-pmic-control-type = "bl_ctrl_dcs";
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qcom,mdss-dsi-bl-min-level = <1>;
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qcom,mdss-dsi-bl-max-level = <1023>;
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};
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&tlmm {
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lt9611_pins: lt9611_pins {
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mux {
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pins = "gpio69", "gpio60", "gpio214", "gpio83";
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function = "gpio";
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};
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config {
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pins = "gpio69", "gpio60", "gpio214", "gpio83";
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drive-strength = <8>;
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bias-disable = <0>;
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};
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||||
};
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||||
};
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||||
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&qupv3_se5_i2c {
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status = "ok";
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||||
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lt9611: lt,lt9611@2b {
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compatible = "lt,lt9611uxc";
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reg = <0x2b>;
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interrupt-parent = <&tlmm>;
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interrupts = <44 0>;
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interrupt-names = "lt_irq";
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lt,irq-gpio = <&tlmm 69 0x0>;
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lt,reset-gpio = <&tlmm 60 0x0>;
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lt,hdmi-3p3-en = <&tlmm 214 0x0>;
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lt,hdmi-1p2-en = <&tlmm 83 0x0>;
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lt,non-pluggable;
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pinctrl-names = "default";
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pinctrl-0 = <<9611_pins>;
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lt,preferred-mode = "1920x1080";
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lt,customize-modes {
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lt,customize-mode-id@0 {
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lt,mode-h-active = <1920>;
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lt,mode-h-front-porch = <88>;
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lt,mode-h-pulse-width = <44>;
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lt,mode-h-back-porch = <148>;
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lt,mode-h-active-high;
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lt,mode-v-active = <1080>;
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lt,mode-v-front-porch = <4>;
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lt,mode-v-pulse-width = <5>;
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lt,mode-v-back-porch = <36>;
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lt,mode-v-active-high;
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lt,mode-clock-in-khz = <148500>;
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};
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||||
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lt,customize-mode-id@1 {
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lt,mode-h-active = <3840>;
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lt,mode-h-front-porch = <176>;
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lt,mode-h-pulse-width = <88>;
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lt,mode-h-back-porch = <400>;
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lt,mode-h-active-high;
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lt,mode-v-active = <2160>;
|
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lt,mode-v-front-porch = <8>;
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lt,mode-v-pulse-width = <10>;
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lt,mode-v-back-porch = <72>;
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lt,mode-v-active-high;
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lt,mode-clock-in-khz = <608040>;
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||||
};
|
||||
};
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||||
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||||
ports {
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||||
#address-cells = <1>;
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||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
lt9611_in_0: endpoint {
|
||||
remote-endpoint = <&ext_dsi_0_out>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&sde_dsi {
|
||||
qcom,dsi-default-panel = <&dsi_ext_bridge_1080p>;
|
||||
ports {
|
||||
#address-cells = <1>;
|
||||
#size-cells = <0>;
|
||||
|
||||
port@0 {
|
||||
reg = <0>;
|
||||
ext_dsi_0_out: endpoint {
|
||||
remote-endpoint = <<9611_in_0>;
|
||||
};
|
||||
};
|
||||
};
|
||||
};
|
||||
|
||||
&battery_charger {
|
||||
qcom,display-panels = <&dsi_vtdr6130_amoled_cmd
|
||||
&dsi_vtdr6130_amoled_video
|
||||
&dsi_vtdr6130_amoled_120hz_cmd
|
||||
&dsi_vtdr6130_amoled_120hz_video>;
|
||||
};
|
||||
Reference in New Issue
Block a user