ARM: dts: msm: Update i2c-pmic support for tuna

Correct the I2C instances used for parallel charger
debug interface.

Change-Id: I3bbdb4fa2777802c04c8e65e2b35dd2e59e716b9
Signed-off-by: Kavya Nunna <quic_knunna@quicinc.com>
This commit is contained in:
Kavya Nunna
2024-12-09 15:29:32 +05:30
parent cf9561dbd6
commit d89207245e
3 changed files with 42 additions and 43 deletions

View File

@@ -29,16 +29,16 @@
}; };
}; };
&pmic_glink_debug {
/delete-node/ i2c@104;
/delete-node/ spmi@200;
i2c@104 { &i2c_pmic_smb1398 {
reg = <0x104>; /* I2C instance 4 in ADSP for SE5 */ status = "disabled";
#address-cells = <1>; };
#size-cells = <0>;
qcom,bus-type = "i2c";
&spmi_pmic_smb1510 {
status = "disabled";
};
&i2c_pmic {
qcom,smb1500@69 { qcom,smb1500@69 {
compatible = "qcom,i2c-pmic"; compatible = "qcom,i2c-pmic";
reg = <0x69>; reg = <0x69>;
@@ -51,7 +51,6 @@
qcom,can-sleep; qcom,can-sleep;
}; };
}; };
};
&pmic_glink_adc { &pmic_glink_adc {
status = "ok"; status = "ok";
@@ -60,32 +59,32 @@
/delete-node/ smb1398_1_die_temp; /delete-node/ smb1398_1_die_temp;
smb1500_1_iin { smb1500_1_iin {
reg = <0x1046901>; reg = <0x1066901>;
label = "smb1393_1_iin"; label = "smb1500_1_iin";
}; };
smb1500_1_ichg { smb1500_1_ichg {
reg = <0x1046902>; reg = <0x1066902>;
label = "smb1393_1_ichg"; label = "smb1500_1_ichg";
}; };
smb1500_1_die_temp { smb1500_1_die_temp {
reg = <0x1046903>; reg = <0x1066903>;
label = "smb1393_1_die_temp"; label = "smb1500_1_die_temp";
}; };
smb1500_2_iin { smb1500_2_iin {
reg = <0x1046801>; reg = <0x1066801>;
label = "smb1393_2_iin"; label = "smb1500_2_iin";
}; };
smb1500_2_ichg { smb1500_2_ichg {
reg = <0x1046802>; reg = <0x1066802>;
label = "smb1393_2_ichg"; label = "smb1500_2_ichg";
}; };
smb1500_2_die_temp { smb1500_2_die_temp {
reg = <0x1046803>; reg = <0x1066803>;
label = "smb1393_2_die_temp"; label = "smb1500_2_die_temp";
}; };
}; };

View File

@@ -37,13 +37,13 @@
}; };
}; };
i2c@104 { i2c_pmic:i2c@106 {
reg = <0x104>; /* I2C instance 4 in ADSP for SE5 */ reg = <0x106>; /* I2C instance 6 in ADSP for SE5 */
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
qcom,bus-type = "i2c"; qcom,bus-type = "i2c";
qcom,smb1398@34 { i2c_pmic_smb1398: qcom,smb1398@34 {
compatible = "qcom,i2c-pmic"; compatible = "qcom,i2c-pmic";
reg = <0x34>; reg = <0x34>;
qcom,can-sleep; qcom,can-sleep;
@@ -51,13 +51,13 @@
}; };
/* SPMI bridge bus 1 with SMB1510 device */ /* SPMI bridge bus 1 with SMB1510 device */
spmi@200 { spmi_pmic:spmi@200 {
reg = <0x200>; reg = <0x200>;
#address-cells = <2>; #address-cells = <2>;
#size-cells = <0>; #size-cells = <0>;
qcom,bus-type = "spmi"; qcom,bus-type = "spmi";
qcom,smb1510@d { spmi_pmic_smb1510: qcom,smb1510@d {
compatible = "qcom,spmi-pmic"; compatible = "qcom,spmi-pmic";
reg = <13 SPMI_USID>; reg = <13 SPMI_USID>;
qcom,can-sleep; qcom,can-sleep;
@@ -69,17 +69,17 @@
status = "ok"; status = "ok";
smb1398_1_iin { smb1398_1_iin {
reg = <0x1043401>; reg = <0x1063401>;
label = "smb1393_1_iin"; label = "smb1393_1_iin";
}; };
smb1398_1_ichg { smb1398_1_ichg {
reg = <0x1043402>; reg = <0x1063402>;
label = "smb1393_1_ichg"; label = "smb1393_1_ichg";
}; };
smb1398_1_die_temp { smb1398_1_die_temp {
reg = <0x1043403>; reg = <0x1063403>;
label = "smb1393_1_die_temp"; label = "smb1393_1_die_temp";
}; };
}; };

View File

@@ -20,8 +20,8 @@
}; };
}; };
i2c@104 { i2c_pmic:i2c@106 {
reg = <0x104>; /* I2C instance 4 in ADSP for SE5 */ reg = <0x106>; /* I2C instance 6 in ADSP for SE5 */
#address-cells = <1>; #address-cells = <1>;
#size-cells = <0>; #size-cells = <0>;
qcom,bus-type = "i2c"; qcom,bus-type = "i2c";
@@ -48,17 +48,17 @@
status = "ok"; status = "ok";
smb1500_1_iin { smb1500_1_iin {
reg = <0x1046901>; reg = <0x1066901>;
label = "smb1393_1_iin"; label = "smb1393_1_iin";
}; };
smb1500_1_ichg { smb1500_1_ichg {
reg = <0x1046902>; reg = <0x1066902>;
label = "smb1393_1_ichg"; label = "smb1393_1_ichg";
}; };
smb1500_1_die_temp { smb1500_1_die_temp {
reg = <0x1046903>; reg = <0x1066903>;
label = "smb1393_1_die_temp"; label = "smb1393_1_die_temp";
}; };
}; };